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H A Dsocfpga_sip_fcs.cb0f447897d3e2ddd72b291cb450165f4d220663e Wed Sep 13 01:25:59 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> fix(intel): update fcs crypto init code to check for mode

The shall code only limit ECB, CBC and CTR mode to flow through the init
function. Anything other than that, the code shall reject to prevent
security vulnerability.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I702ce90e229188830f8936bee2999610e9559b8b