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H A Dfvp-ve-Cortex-A7x1.dtsa25349b75ccf9bb423c44076565c48be6c656e60 Thu Aug 25 11:59:10 UTC 2022 Andre Przywara <andre.przywara@arm.com> refactor(fvp_ve): fdts: prepare Cortex-A5 and A7 model DTs

The DT files for the Cortex-A5 and Cortex-A7 FVP models include the
shared rtsm_ve-motherboard.dtsi file, which we need to sync with the
upstream Linux version soon.

To prepare for its changed structure there, adjust the top-level
#address-cells and #size-cells properties to be compatible with the
expectations of the Linux version.
Also extend the interrupt map to cover all peripherals listed in the
motherboard file, and use the proper GIC macros to make them more
readable on the way.

Change-Id: I7d1493f1a200e8350530f912833f9ffcc5f94b21
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
H A Dfvp-ve-Cortex-A5x1.dtsa25349b75ccf9bb423c44076565c48be6c656e60 Thu Aug 25 11:59:10 UTC 2022 Andre Przywara <andre.przywara@arm.com> refactor(fvp_ve): fdts: prepare Cortex-A5 and A7 model DTs

The DT files for the Cortex-A5 and Cortex-A7 FVP models include the
shared rtsm_ve-motherboard.dtsi file, which we need to sync with the
upstream Linux version soon.

To prepare for its changed structure there, adjust the top-level
#address-cells and #size-cells properties to be compatible with the
expectations of the Linux version.
Also extend the interrupt map to cover all peripherals listed in the
motherboard file, and use the proper GIC macros to make them more
readable on the way.

Change-Id: I7d1493f1a200e8350530f912833f9ffcc5f94b21
Signed-off-by: Andre Przywara <andre.przywara@arm.com>