Searched hist:"9 faa74443f1ed89355c12b1d5b2b756e9c408311" (Results 1 – 2 of 2) sorted by relevance
| /optee_os/core/arch/arm/kernel/ |
| H A D | thread_a32.S | 9faa74443f1ed89355c12b1d5b2b756e9c408311 Mon Mar 09 21:56:30 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: core_mmu_v7.c: set TTBCR_PD1 in reduced mappings
When using reduced mappings set TTBCR_PD1 in order to disable table walks using TTBR1 which holds the OP-TEE Core mappings. This saves us from keeping an empty L1 translation table (16 KiB) with CFG_CORE_UNMAP_CORE_AT_EL0=y.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/core/arch/arm/mm/ |
| H A D | core_mmu_v7.c | 9faa74443f1ed89355c12b1d5b2b756e9c408311 Mon Mar 09 21:56:30 UTC 2020 Jens Wiklander <jens.wiklander@linaro.org> core: core_mmu_v7.c: set TTBCR_PD1 in reduced mappings
When using reduced mappings set TTBCR_PD1 in order to disable table walks using TTBR1 which holds the OP-TEE Core mappings. This saves us from keeping an empty L1 translation table (16 KiB) with CFG_CORE_UNMAP_CORE_AT_EL0=y.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
|