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| H A D | PX30TRUST.ini | 9940cf2a75798d52ddf008744e1b3d8799860688 Thu Feb 17 09:39:19 UTC 2022 Zhihuan He <huan.he@rock-chips.com> px30: bl31: update version to v1.27
Build from ATF commit:
96550638e plat: px30-s: dram: phy io ctrl save and resume
Update feature:
96550638e plat: px30-s: dram: phy io ctrl save and resume
61fb26d65 plat: px30-s: dram: fix ck/ckb to low before deepsleep
90c6c51f7 plat: rockchip: rk3588: Set gpll source clock div to 0
c5157a42e plat: px30-s: Restore DDR PHY dfi low power function
0de2c3db8 plat: px30: sleep: enter ddr sref by software
16fda9dd6 plat: px30s: suspend: add ddr resume support
91188bd6f plat: px30: suspend: support ddr resume
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I42b2ac01c74ad3f17a7e300fcb214993c82fe057
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