Searched hist:"844 e6cc5e73d081f0709d6cf39de6c4b0ff9c08b" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/ |
| H A D | plat_smmu.c | 844e6cc5e73d081f0709d6cf39de6c4b0ff9c08b Thu Apr 19 07:41:43 UTC 2018 Pritesh Raithatha <praithatha@nvidia.com> Tegra194: smmu: add PCIE0R1 mc reg to system suspend save list
PCIE0R1 security and override registers need to be preserved across
system suspend. Adding them to system suspend save register list.
Due to addition of above registers, increasing context save memory
by 2 bytes.
Change-Id: I1b3a56aee31f3c11e3edc2fb0a6da146eec1a30d
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| H A D | plat_trampoline.S | 844e6cc5e73d081f0709d6cf39de6c4b0ff9c08b Thu Apr 19 07:41:43 UTC 2018 Pritesh Raithatha <praithatha@nvidia.com> Tegra194: smmu: add PCIE0R1 mc reg to system suspend save list
PCIE0R1 security and override registers need to be preserved across
system suspend. Adding them to system suspend save register list.
Due to addition of above registers, increasing context save memory
by 2 bytes.
Change-Id: I1b3a56aee31f3c11e3edc2fb0a6da146eec1a30d
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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