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| /optee_os/core/include/kernel/ |
| H A D | transfer_list.h | 773d3f838f1b418257472a78e2b0425e6f439537 Mon Jul 08 12:13:41 UTC 2024 Levi Yun <yeoreum.yun@arm.com> core: kernel: Fix checking register convention r1/x1 value of transfer_list
According to recently firmware handsoff spec [1]'s
"Register usage at handoff boundary", Transfer List's signature value
was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes).
As updating of TL's signature, register value of x1/r1 should be:
In aarch32's r1 value should be
R1[23:0]: set to the TL signature (4a0f_b10b->masked value: 0f_b10b)
R1[31:24]: version of the register convention == 1
and
In aarch64's x1 value should be
X1[31:0]: set to the TL signature (4a0f_b10b)
X1[39:32]: version of the register convention == 1
X1[63:40]: MBZ
(See the [2] and [3]).
Therefore, it requires to separate mask and shift value for register
convention version field when checking each r1/x1 value.
This patch fix two problems:
1. breaking X1 value with updated specification in aarch64
- change of length of signature field.
2. previous error value set in R1 in arm32.
- length of signature should be 24, but it uses 32bit signature.
This patch is a breaking change. It works only TF-A is updated.
Link: https://github.com/FirmwareHandoff/firmware_handoff [1]
Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2]
Link: https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027 [3]
Fixes: 508e2476b232 ("core: update transfer list header and signature")
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| /optee_os/core/arch/arm/kernel/ |
| H A D | boot.c | 773d3f838f1b418257472a78e2b0425e6f439537 Mon Jul 08 12:13:41 UTC 2024 Levi Yun <yeoreum.yun@arm.com> core: kernel: Fix checking register convention r1/x1 value of transfer_list
According to recently firmware handsoff spec [1]'s
"Register usage at handoff boundary", Transfer List's signature value
was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes).
As updating of TL's signature, register value of x1/r1 should be:
In aarch32's r1 value should be
R1[23:0]: set to the TL signature (4a0f_b10b->masked value: 0f_b10b)
R1[31:24]: version of the register convention == 1
and
In aarch64's x1 value should be
X1[31:0]: set to the TL signature (4a0f_b10b)
X1[39:32]: version of the register convention == 1
X1[63:40]: MBZ
(See the [2] and [3]).
Therefore, it requires to separate mask and shift value for register
convention version field when checking each r1/x1 value.
This patch fix two problems:
1. breaking X1 value with updated specification in aarch64
- change of length of signature field.
2. previous error value set in R1 in arm32.
- length of signature should be 24, but it uses 32bit signature.
This patch is a breaking change. It works only TF-A is updated.
Link: https://github.com/FirmwareHandoff/firmware_handoff [1]
Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2]
Link: https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027 [3]
Fixes: 508e2476b232 ("core: update transfer list header and signature")
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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