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| H A D | stm32_rifsc.c | 6cdfe3e0ae50a135d34c644a28cb2fad340e7a4b Mon Jul 22 08:02:52 UTC 2024 Gatien Chevallier <gatien.chevallier@foss.st.com> drivers: stm32_rifsc: implement transient CID0 on AHB errata for RIMUs
On stm32mp2x SoCs, when an AHB busy signal is inserted during a
transaction, a ghost CID0 is generated on the bus. If the compartment
filtering is enabled on RISAB3/4/5, this transient CID0 is interpreted
as a fault access by RISAB3/4/5 which aborts current access and returns
an IAC. Described in section 2.3.21 of errata sheet available here: [1].
Therefore, when CID filtering is enabled on RISAB, we must ban CID0 as
a possible CID value configured for any initiator on the bus.
This avoids a conflict between an initiator holding CID0 and the
transient CID0.
When "st,errata-ahbrisab" is set in the device tree, RIMUs cannot hold
the CID0 value on the bus.
Link: https://www.st.com/resource/en/errata_sheet/es0598-stm32mp23xx25xx-device-errata-stmicroelectronics.pdf [1]
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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