Searched hist:"663 db206f85653f05c5f6adb577970cc4669a7ea" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/common/aarch64/ |
| H A D | platform_up_stack.S | 663db206f85653f05c5f6adb577970cc4669a7ea Thu Jun 09 16:16:35 UTC 2016 Soby Mathew <soby.mathew@arm.com> Derive stack alignment from CACHE_WRITEBACK_GRANULE
The per-cpu stacks should be aligned to the cache-line size and
the `declare_stack` helper in asm_macros.S macro assumed a
cache-line size of 64 bytes. The platform defines the cache-line
size via CACHE_WRITEBACK_GRANULE macro. This patch modifies
`declare_stack` helper macro to derive stack alignment from the
platform defined macro.
Change-Id: I1e1b00fc8806ecc88190ed169f4c8d3dd25fe95b
|
| H A D | platform_mp_stack.S | 663db206f85653f05c5f6adb577970cc4669a7ea Thu Jun 09 16:16:35 UTC 2016 Soby Mathew <soby.mathew@arm.com> Derive stack alignment from CACHE_WRITEBACK_GRANULE
The per-cpu stacks should be aligned to the cache-line size and
the `declare_stack` helper in asm_macros.S macro assumed a
cache-line size of 64 bytes. The platform defines the cache-line
size via CACHE_WRITEBACK_GRANULE macro. This patch modifies
`declare_stack` helper macro to derive stack alignment from the
platform defined macro.
Change-Id: I1e1b00fc8806ecc88190ed169f4c8d3dd25fe95b
|