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H A Darm.mk3fd383ffcd5cf8862615f9871d38e228a420c515 Fri Jul 29 10:06:50 UTC 2022 Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com> arm.mk: Added CFG_MAX_CACHE_LINE_SHIFT for maximum cache line size

When sharing memory between CPU and peripherals it is important that data
is accurate for all parties.

Today's CPU's has multiple levels for caches and their sizes are platform
specific. As there is no auto detectable way to determine cache line size
during runtime so it must be defined during compilation time.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>