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/optee_os/core/drivers/clk/
H A Dclk-stm32mp15.c3e3bea3da4a624819ac9581b2fc64da88a70beb1 Wed Nov 17 17:04:34 UTC 2021 Etienne Carriere <etienne.carriere@linaro.org> drivers: clk: stm32mp1: fix BRSRAM parent clock reference

Fix reference to BKPSRAM parent clock for platform stm32mp1. No
functional change as parent clock reference used prior the change
(_PCLK5) led to the same parent clock rate value.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>