Searched hist:"276 a43663e8e315fa1bf0aa4824051d88705858b" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/common/include/ |
| H A D | socfpga_sip_svc.h | 276a43663e8e315fa1bf0aa4824051d88705858b Thu Apr 28 14:40:58 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): bit-wise configuration flag handling
Change configuration type handling to bit-wise flag. This is to align
with Linux's FPGA Manager definitions and promotes better compatibility.
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I5aaf91d3fec538fe3f4fe8395d9adb47ec969434
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| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_sip_svc.c | 276a43663e8e315fa1bf0aa4824051d88705858b Thu Apr 28 14:40:58 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): bit-wise configuration flag handling
Change configuration type handling to bit-wise flag. This is to align
with Linux's FPGA Manager definitions and promotes better compatibility.
Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I5aaf91d3fec538fe3f4fe8395d9adb47ec969434
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