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12

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/serial/
H A Dsocionext,uniphier-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/socionext,uniphier-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier UART controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 const: socionext,uniphier-uart
25 auto-flow-control:
30 - compatible
31 - reg
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Duniphier-ld11.dtsi2 * Device Tree Source for UniPhier LD11 SoC
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 compatible = "socionext,uniphier-ld11";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
22 cpu-map {
35 compatible = "arm,cortex-a53", "arm,armv8";
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H A Duniphier-ld4.dtsi2 * Device Tree Source for UniPhier LD4 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
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H A Duniphier-sld8.dtsi2 * Device Tree Source for UniPhier sLD8 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
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H A Duniphier-pxs3.dtsi2 * Device Tree Source for UniPhier PXs3 SoC
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 compatible = "socionext,uniphier-pxs3";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
22 cpu-map {
41 compatible = "arm,cortex-a53", "arm,armv8";
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H A Duniphier-ld20.dtsi2 * Device Tree Source for UniPhier LD20 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 compatible = "socionext,uniphier-ld20";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
22 cpu-map {
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H A Duniphier-pro4.dtsi2 * Device Tree Source for UniPhier Pro4 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
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H A Duniphier-pro5.dtsi2 * Device Tree Source for UniPhier Pro5 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "socionext,uniphier-pro5";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
24 enable-method = "psci";
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H A Duniphier-pxs2.dtsi2 * Device Tree Source for UniPhier PXs2 SoC
4 * Copyright (C) 2015-2016 Socionext Inc.
7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 compatible = "socionext,uniphier-pxs2";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
24 enable-method = "psci";
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier sLD8 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
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H A Duniphier-ld4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-ld4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
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H A Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro4 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
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H A Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier Pro5 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
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H A Duniphier-pxs2.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs2 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/thermal/thermal.h>
12 compatible = "socionext,uniphier-pxs2";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/socionext/
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD11 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
12 compatible = "socionext,uniphier-ld11";
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <0>;
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H A Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier PXs3 SoC
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs3";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
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H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-ld20";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
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H A Duniphier-ld20-akebi96.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Derived from uniphier-ld20-global.dts.
7 // Copyright (C) 2015-2017 Socionext Inc.
8 // Copyright (C) 2019-2020 Linaro Ltd.
10 /dts-v1/;
11 #include <dt-bindings/gpio/uniphier-gpio.h>
12 #include "uniphier-ld20.dtsi"
16 compatible = "socionext,uniphier-ld20-akebi96",
17 "socionext,uniphier-ld20";
20 stdout-path = "serial0:115200n8";
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/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/
H A DKconfig4 default "uniphier"
14 prompt "UniPhier SoC select"
18 bool "UniPhier LD4/sLD8 SoCs"
22 bool "UniPhier Pro4 SoC"
26 bool "UniPhier Pro5/PXs2/LD6b SoCs"
30 bool "UniPhier V8 SoCs"
38 bool "Enable UniPhier LD4 SoC support"
43 bool "Enable UniPhier sLD8 SoC support"
48 bool "Enable UniPhier Pro5 SoC support"
53 bool "Enable UniPhier Pxs2 SoC support"
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/OK3568_Linux_fs/u-boot/drivers/serial/
H A DKconfig11 Select a default baudrate, where "default" has a driver-specific
12 meaning of either setting the baudrate for the early debug UART
19 # non-dm serial code
32 In very space-constrained devices even the full UART driver is too
33 large. In this case the debug UART can still be used in some cases.
34 This option enables the full UART in U-Boot, so if is it disabled,
35 the full UART driver will be omitted, thus saving space.
42 In very space-constrained devices even the full UART driver is too
43 large. In this case the debug UART can still be used in some cases.
44 This option enables the full UART in SPL, so if is it disabled,
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H A Dserial_uniphier.c2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
6 * SPDX-License-Identifier: GPL-2.0+
43 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
52 divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate); in uniphier_serial_setbrg()
54 writel(divisor, &port->dlr); in uniphier_serial_setbrg()
63 if (!(readl(&port->lsr) & UART_LSR_DR)) in uniphier_serial_getc()
64 return -EAGAIN; in uniphier_serial_getc()
66 return readl(&port->rx); in uniphier_serial_getc()
73 if (!(readl(&port->lsr) & UART_LSR_THRE)) in uniphier_serial_putc()
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/OK3568_Linux_fs/kernel/drivers/tty/serial/8250/
H A D8250_uniphier.c1 // SPDX-License-Identifier: GPL-2.0+
17 * - MMIO32 (regshift = 2)
18 * - FCR is not at 2, but 3
19 * - LCR and MCR are not at 3 and 4, they share 4
20 * - No SCR (Instead, CHAR can be used as a scratch register)
21 * - Divisor latch at 9, no divisor latch access bit
43 if (!device->port.membase) in uniphier_early_console_setup()
44 return -ENODEV; in uniphier_early_console_setup()
47 device->port.iotype = UPIO_MEM32; in uniphier_early_console_setup()
48 device->port.regshift = UNIPHIER_UART_REGSHIFT; in uniphier_early_console_setup()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
24 non-standard serial ports, since the configuration information will
52 If you did not notice yet and/or you have userspace from pre-3.7, it
75 bool "Support for Fintek F81216A LPC to 4 UART RS485 API"
79 of the Fintek F81216A LPC to 4 UART.
126 bool "DMA support for 16550 compatible UART controllers" if EXPERT
131 compatible UART controllers that support DMA signaling.
141 Note that serial ports on NetMos 9835 Multi-I/O cards are handled
162 Say Y here to enable support for 16-bit PCMCIA serial devices,
164 multi-function Ethernet/modem cards. (PCMCIA- or PC-cards are
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier System Bus
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
16 within each bank to the CPU-viewed address. The needed setup includes the
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
25 const: socionext,uniphier-system-bus
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/OK3568_Linux_fs/u-boot/doc/
H A DREADME.uniphier1 U-Boot for UniPhier SoC family
6 ----------------------
8 The UniPhier platform is well tested with Linaro toolchains.
9 You can download pre-built toolchains from:
15 ------------------
20 $ make CROSS_COMPILE=<toolchain-prefix> DEVICE_TREE=<device-tree>
22 The recommended <toolchain-prefix> is `arm-linux-gnueabihf-` for 32bit SoCs,
23 `aarch64-linux-gnu-` for 64bit SoCs, but you may wish to change it to use your
26 The following tables show <defconfig> and <device-tree> for each board.
30 Board | <defconfig> | <device-tree>
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