Searched +full:tuning +full:- +full:start +full:- +full:tap (Results 1 – 25 of 28) sorted by relevance
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1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2015-19 Renesas Electronics Corporation6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman13 * Copyright 2004-2005 Phil Blundell14 * Copyright 2007-2008 OpenedHand Ltd.30 #include <linux/mmc/slot-gpio.h>35 #include <linux/pinctrl/pinctrl-state.h>87 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable()91 ret = clk_prepare_enable(priv->clk_cd); in renesas_sdhi_clk_enable()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 #include <linux/dma-mapping.h>23 #include <linux/mmc/slot-gpio.h>27 #include "sdhci-cqhci.h"28 #include "sdhci-pltfm.h"181 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()183 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()189 return readw(host->ioaddr + reg); in tegra_sdhci_readw()202 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()205 writel((val << 16) | pltfm_host->xfer_mode_shadow, in tegra_sdhci_writew()[all …]
1 // SPDX-License-Identifier: GPL-2.05 * derived from the OF-version.23 #include <linux/mmc/slot-gpio.h>27 #include <linux/platform_data/mmc-esdhc-imx.h>29 #include "sdhci-cqhci.h"30 #include "sdhci-pltfm.h"31 #include "sdhci-esdhc.h"71 /* Tuning bits */83 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)102 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */[all …]
1 // SPDX-License-Identifier: GPL-2.03 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com18 #include "sdhci-cqhci.h"19 #include "sdhci-pltfm.h"106 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",107 "ti,itap-del-sel-legacy",109 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",110 "ti,itap-del-sel-mmc-hs",112 [MMC_TIMING_SD_HS] = {"ti,otap-del-sel-sd-hs",[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Shawn Guo <shawnguo@kernel.org>13 - $ref: "mmc-controller.yaml"20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.25 - enum:26 - fsl,imx25-esdhc27 - fsl,imx35-esdhc[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8mp-clock.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/input/input.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/thermal/thermal.h>12 #include "imx8mp-pinfunc.h"15 interrupt-parent = <&gic>;16 #address-cells = <2>;17 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8mn-clock.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/input/input.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/thermal/thermal.h>12 #include "imx8mn-pinfunc.h"15 interrupt-parent = <&gic>;16 #address-cells = <2>;17 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8mm-clock.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/input/input.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/thermal/thermal.h>12 #include "imx8mm-pinfunc.h"15 interrupt-parent = <&gic>;16 #address-cells = <2>;17 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>7 #include <dt-bindings/clock/imx8mq-clock.h>8 #include <dt-bindings/power/imx8mq-power.h>9 #include <dt-bindings/reset/imx8mq-reset.h>10 #include <dt-bindings/gpio/gpio.h>11 #include "dt-bindings/input/input.h"12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/thermal/thermal.h>14 #include "imx8mq-pinfunc.h"[all …]
1 // SPDX-License-Identifier: GPL-2.0+4 * Copyright 2017-2018 NXP8 #include <dt-bindings/clock/imx8-clock.h>9 #include <dt-bindings/firmware/imx/rsrc.h>10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/input/input.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/pinctrl/pads-imx8qxp.h>14 #include <dt-bindings/thermal/thermal.h>17 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+4 * Copyright 2017-2018 NXP8 #include <dt-bindings/clock/imx7ulp-clock.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include "imx7ulp-pinfunc.h"15 interrupt-parent = <&intc>;17 #address-cells = <1>;18 #size-cells = <1>;37 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)4 * Copyright 2017-2018 NXP.8 #include <dt-bindings/clock/imx6sll-clock.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include "imx6sll-pinfunc.h"14 #address-cells = <1>;15 #size-cells = <1>;44 #address-cells = <1>;45 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6ul-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include "imx6ul-pinfunc.h"12 #address-cells = <1>;13 #size-cells = <1>;16 * pre-existing /chosen node to be available to insert the55 #address-cells = <1>;[all …]
9 #include <dt-bindings/clock/imx6sll-clock.h>10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include "imx6sll-pinfunc.h"43 #address-cells = <1>;44 #size-cells = <0>;47 compatible = "arm,cortex-a9";50 next-level-cache = <&L2>;51 operating-points = <58 fsl,soc-operating-points = <[all …]
2 * Copyright 2015-2016 Freescale Semiconductor, Inc.9 #include <dt-bindings/clock/imx7ulp-clock.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/gpio/gpio.h>13 #include "imx7ulp-pinfunc.h"16 interrupt-parent = <&intc>;37 #address-cells = <1>;38 #size-cells = <0>;41 compatible = "arm,cortex-a7";47 reserved-memory {[all …]
1 // SPDX-License-Identifier: GPL-2.0-only5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com>20 * The higher 16-bit of this register is used for write protection98 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()99 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()103 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power()104 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power()113 rate = clk_get_rate(rk_phy->emmcclk); in rockchip_emmc_phy_power()138 rate - ideal_rate : ideal_rate - rate; in rockchip_emmc_phy_power()141 * In order for tuning delays to be accurate we need to be in rockchip_emmc_phy_power()[all …]
1 .. SPDX-License-Identifier: GPL-2.025 Most OSes today have built-in support for a number of "fake"27 User Mode Linux takes this concept to the ultimate extreme - there30 concepts which map onto something provided by the host - files, sockets,36 The UML kernel is just a process running on Linux - same as any other57 * You can run a usermode kernel as a non-root user (you may need to99 This is extremely easy on Debian - you can do it using debootstrap. It is100 also easy on OpenWRT - the build process can build UML images. All other101 distros - YMMV.114 or by running ``tune2fs -o discard /dev/ubdXX`` will request UML to[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (c) 2011-2015 Synaptics Incorporated66 * @rezero - writing this to the F11 command register will cause the sensor to183 * @nr_fingers - describes the maximum number of fingers the 2-D sensor185 * @has_rel - the sensor supports relative motion reporting.186 * @has_abs - the sensor supports absolute poition reporting.187 * @has_gestures - the sensor supports gesture reporting.188 * @has_sensitivity_adjust - the sensor supports a global sensitivity190 * @configurable - the sensor supports various configuration options.191 * @num_of_x_electrodes - the maximum number of electrodes the 2-D sensor[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * AppliedMicro X-Gene Multi-purpose PHY driver10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.19 * -----------------20 * | Internal | |------|21 * | Ref PLL CMU |----| | ------------- ---------22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|23 * | | | | ---------24 * External Clock ------| | -------------25 * |------|[all …]
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10 '\" Replacement em-dash for nroff (default is too short).34 SoX \- Sound eXchange, the Swiss Army knife of audio manipulation37 \fBsox\fR [\fIglobal-options\fR] [\fIformat-options\fR] \fIinfile1\fR38 [[\fIformat-options\fR] \fIinfile2\fR] ... [\fIformat-options\fR] \fIoutfile\fR39 [\fIeffect\fR [\fIeffect-options\fR]] ...41 \fBplay\fR [\fIglobal-options\fR] [\fIformat-options\fR] \fIinfile1\fR42 [[\fIformat-options\fR] \fIinfile2\fR] ... [\fIformat-options\fR]43 [\fIeffect\fR [\fIeffect-options\fR]] ...45 \fBrec\fR [\fIglobal-options\fR] [\fIformat-options\fR] \fIoutfile\fR46 [\fIeffect\fR [\fIeffect-options\fR]] ...[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */2 /* Copyright (C) 2017 - 2018 Intel Corporation */11 /* Vendor specific - used for IPU3 camera sub-system */15 /* from include/uapi/linux/v4l2-controls.h */24 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)32 * struct ipu3_uapi_grid_config - Grid plane config48 * create a grid-based output, and the data is then divided into "slices".79 * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer90 * struct ipu3_uapi_awb_config_s - AWB config110 * struct ipu3_uapi_awb_config - AWB config wrapper[all …]
5 force -- enable ACPI if default was off6 on -- enable ACPI but allow fallback to DT [arm64]7 off -- disable ACPI if default was on8 noirq -- do not use ACPI for IRQ routing9 strict -- Be less tolerant of platforms that are not11 rsdt -- prefer RSDT over (default) XSDT12 copy_dsdt -- copy DSDT to memory26 If set to vendor, prefer vendor-specific driver58 Documentation/firmware-guide/acpi/debug.rst for more information about121 Disable auto-serialization of AML methods[all …]
1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK21 ":ref:`overview-manual/yp-intro:the yocto project layer model`"25 -----------------------33 layer-creation tools, see the34 ":ref:`bsp-guide/bsp:creating a new bsp layer using the \`\`bitbake-layers\`\` script`"36 …Guide and the ":ref:`dev-manual/common-tasks:creating a general layer using the \`\`bitbake-layers…54 the string "meta-". For example::56 meta-mylayer57 meta-GUI_xyz58 meta-mymachine[all …]