Searched +full:nand +full:- +full:use +full:- +full:soft +full:- +full:ecc +full:- +full:engine (Results 1 – 12 of 12) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NAND Chip and NAND Controller Generic Binding10 - Miquel Raynal <miquel.raynal@bootlin.com>11 - Richard Weinberger <richard@nod.at>14 The NAND controller should be represented with its own DT node, and15 all NAND chips attached to this controller should be defined as16 children nodes of the NAND controller. This representation should be[all …]
1 Atmel NAND flash controller bindings3 The NAND flash controller node should be defined under the EBI bus (see4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).5 One or several NAND devices can be defined under this NAND controller.6 The NAND controller might be connected to an ECC engine.8 * NAND controller bindings:11 - compatible: should be one of the following12 "atmel,at91rm9200-nand-controller"13 "atmel,at91sam9260-nand-controller"14 "atmel,at91sam9261-nand-controller"[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * Generic Error-Correcting Code (ECC) engine10 * This file describes the abstraction of any NAND ECC engine. It has been11 * designed to fit most cases, including parallel NANDs and SPI-NANDs.13 * There are three main situations where instantiating this ECC engine makes15 * - external: The ECC engine is outside the NAND pipeline, typically this16 * is a software ECC engine, or an hardware engine that is17 * outside the NAND controller pipeline.18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the19 * controller's side. This is the case of most of the raw NAND[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Arasan NAND Flash Controller Driver5 * Copyright (C) 2014 - 2020 Xilinx, Inc.17 #include <linux/dma-mapping.h>103 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)111 * struct anfc_op - Defines how to execute an operation136 * struct anand - Defines the NAND chip related information137 * @node: Used to store NAND chips into a list138 * @chip: NAND chip information structure140 * @rb: Ready-busy line[all …]
1 // SPDX-License-Identifier: GPL-2.0-only4 * This is the generic MTD driver for NAND flash devices. It should be5 * capable of working with almost all NAND chips currently available.8 * http://www.linux-mtd.infradead.org/doc/nand.html11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)21 * Check, if mtd->ecctype should be set to MTD_ECC_HW22 * if we have HW ECC support.37 #include <linux/mtd/nand.h>52 int lastpage = (mtd->erasesize / mtd->writesize) - 1; in nand_pairing_dist3_get_info()59 info->group = 0; in nand_pairing_dist3_get_info()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * davinci_nand.c - NAND Flash Driver for DaVinci family chips8 * Sander Huijsen <Shuijsen@optelecom-nkf.com>24 #include <linux/platform_data/mtd-davinci.h>25 #include <linux/platform_data/mtd-davinci-aemif.h>28 * This is a device driver for the NAND flash controller found on the33 * The 1-bit ECC hardware is supported, as well as the newer 4-bit ECC34 * available on chips like the DM355 and OMAP-L137 and needed with the35 * more error-prone MLC NAND chips.37 * This driver assumes EM_WAIT connects all the NAND devices' RDY/nBUSY[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright © 2004-2008 Simtec Electronics7 * Samsung S3C2410/S3C2440/S3C2412 NAND driver10 #define pr_fmt(fmt) "nand-s3c2410: " fmt36 #include <linux/platform_data/mtd-nand-s3c2410.h>73 /* new oob placement block for use with hardware ecc generation79 return -ERANGE; in s3c2410_ooblayout_ecc()81 oobregion->offset = 0; in s3c2410_ooblayout_ecc()82 oobregion->length = 3; in s3c2410_ooblayout_ecc()91 return -ERANGE; in s3c2410_ooblayout_free()[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * Freescale GPMI NAND Flash Driver5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.18 #include <linux/dma/mxs-dma.h>19 #include "gpmi-nand.h"20 #include "gpmi-regs.h"21 #include "bch-regs.h"23 /* Resource names for the GPMI NAND driver. */24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()[all …]
3 * This is the generic MTD driver for NAND flash devices. It should be4 * capable of working with almost all NAND chips currently available.7 * http://www.linux-mtd.infradead.org/doc/nand.html10 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)20 * Check, if mtd->ecctype should be set to MTD_ECC_HW21 * if we have HW ECC support.113 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()115 ret = -EINVAL; in check_offs_len()119 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()121 ret = -EINVAL; in check_offs_len()[all …]
9 -------------------------29 5. Make a patch available to the relevant maintainer in the list. Use30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------[all …]
... 70 esac 71fi 72 73# if the command-not-found package is installed, use it 74 ...