Searched +full:meson +full:- +full:gx +full:- +full:uart (Results 1 – 20 of 20) sorted by relevance
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)12 #include <dt-bindings/gpio/gpio.h>13 #include <dt-bindings/interrupt-controller/irq.h>14 #include <dt-bindings/interrupt-controller/arm-gic.h>15 #include <dt-bindings/power/meson-gxbb-power.h>16 #include <dt-bindings/thermal/thermal.h>19 interrupt-parent = <&gic>;20 #address-cells = <2>;21 #size-cells = <2>;23 reserved-memory {[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/interrupt-controller/irq.h>7 #include <dt-bindings/interrupt-controller/arm-gic.h>8 #include <dt-bindings/gpio/meson-a1-gpio.h>13 interrupt-parent = <&gic>;14 #address-cells = <2>;15 #size-cells = <2>;18 #address-cells = <2>;19 #size-cells = <0>;23 compatible = "arm,cortex-a35";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/phy/phy.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/clock/g12a-clkc.h>9 #include <dt-bindings/clock/g12a-aoclkc.h>10 #include <dt-bindings/interrupt-controller/irq.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>13 #include <dt-bindings/thermal/thermal.h>16 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/axg-aoclkc.h>7 #include <dt-bindings/clock/axg-audio-clkc.h>8 #include <dt-bindings/clock/axg-clkc.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/gpio/meson-axg-gpio.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;8 #include "meson-gxl-s905d.dtsi"9 #include "meson-gx-p23x-q20x.dtsi"10 #include <dt-bindings/leds/common.h>13 compatible = "smartlabs,sml5442tw", "amlogic,s905d", "amlogic,meson-gxl";14 model = "SmartLabs SML-5442TW";17 compatible = "gpio-leds";23 default-state = "off";30 default-state = "off";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;8 #include "meson-gxm.dtsi"9 #include "meson-gx-p23x-q20x.dtsi"10 #include <dt-bindings/input/input.h>11 #include <dt-bindings/leds/common.h>14 compatible = "wetek,core2", "amlogic,s912", "amlogic,meson-gxm";23 compatible = "gpio-leds";29 default-state = "on";33 adc-keys {[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 /dts-v1/;10 #include <dt-bindings/input/input.h>11 #include <dt-bindings/sound/meson-aiu.h>13 #include "meson-gxl-s805x.dtsi"16 compatible = "libretech,aml-s805x-ac", "amlogic,s805x",17 "amlogic,meson-gxl";18 model = "Libre Computer AML-S805X-AC";27 stdout-path = "serial0:115200n8";30 cvbs-connector {[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 /dts-v1/;10 #include <dt-bindings/input/input.h>11 #include <dt-bindings/sound/meson-aiu.h>13 #include "meson-gxl-s905x.dtsi"16 compatible = "libretech,aml-s905x-cc", "amlogic,s905x",17 "amlogic,meson-gxl";18 model = "Libre Computer AML-S905X-CC";25 dio2133: analog-amplifier {26 compatible = "simple-audio-amplifier";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 * Based on meson-gx-p23x-q20x.dtsi:5 * - Copyright (c) 2016 Endless Computers, Inc.7 * - Copyright (c) 2016 BayLibre, SAS.13 #include "meson-gxl-s905x.dtsi"22 stdout-path = "serial0:115200n8";30 hdmi_5v: regulator-hdmi-5v {31 compatible = "regulator-fixed";33 regulator-name = "HDMI_5V";34 regulator-min-microvolt = <5000000>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 * the pin-compatible S912 (GXM) or S905D (GXL) SoCs.11 #include <dt-bindings/sound/meson-aiu.h>19 dio2133: analog-amplifier {20 compatible = "simple-audio-amplifier";21 sound-name-prefix = "AU2";22 VCC-supply = <&hdmi_5v>;23 enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;26 spdif_dit: audio-codec-0 {27 #sound-dai-cells = <0>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"8 title: Amlogic Meson SoC UART Serial Interface11 - Neil Armstrong <narmstrong@baylibre.com>14 The Amlogic Meson SoC UART Serial Interface is present on a large range15 of SoCs, and can be present either in the "Always-On" power domain or the16 "Everything-Else" power domain.18 The particularity of the "Always-On" Serial Interface is that the hardware[all …]
10 * This file is dual-licensed: you can use it either under the terms49 #include <dt-bindings/gpio/gpio.h>50 #include <dt-bindings/interrupt-controller/irq.h>51 #include <dt-bindings/interrupt-controller/arm-gic.h>54 interrupt-parent = <&gic>;55 #address-cells = <2>;56 #size-cells = <2>;58 reserved-memory {59 #address-cells = <2>;60 #size-cells = <2>;[all …]
4 controllers within the Always-On part of the SoC.8 - compatible: value should be different for each SoC family as :9 - GXBB (S905) : "amlogic,meson-gxbb-aoclkc"10 - GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"11 - GXM (S912) : "amlogic,meson-gxm-aoclkc"12 - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"13 - G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc"14 followed by the common "amlogic,meson-gx-aoclkc"15 - clocks: list of clock phandle, one for each entry clock-names.16 - clock-names: should contain the following:[all …]
8 - compatible: should be:9 "amlogic,gxbb-clkc" for GXBB SoC,10 "amlogic,gxl-clkc" for GXL and GXM SoC,11 "amlogic,axg-clkc" for AXG SoC.12 "amlogic,g12a-clkc" for G12A SoC.13 "amlogic,g12b-clkc" for G12B SoC.14 "amlogic,sm1-clkc" for SM1 SoC.15 - clocks : list of clock phandle, one for each entry clock-names.16 - clock-names : should contain the following:19 - #clock-cells: should be 1.[all …]
1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA31 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */32 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */33 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */34 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */35 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */36 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */37 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */41 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */[all …]
1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA45 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */46 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */47 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */48 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */49 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */50 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */51 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */55 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */[all …]
1 // SPDX-License-Identifier: GPL-2.096 val = readl(port->membase + AML_UART_STATUS); in meson_uart_tx_empty()105 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()107 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_tx()114 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()116 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_stop_rx()124 free_irq(port->irq, port); in meson_uart_shutdown()126 spin_lock_irqsave(&port->lock, flags); in meson_uart_shutdown()128 val = readl(port->membase + AML_UART_CONTROL); in meson_uart_shutdown()131 writel(val, port->membase + AML_UART_CONTROL); in meson_uart_shutdown()[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]