Searched +full:imx23 +full:- +full:pwm (Results 1 – 21 of 21) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0+5 #include "imx23-pinfunc.h"8 #address-cells = <1>;9 #size-cells = <1>;11 interrupt-parent = <&icoll>;14 * pre-existing /chosen node to be available to insert the31 #address-cells = <1>;32 #size-cells = <0>;35 compatible = "arm,arm926ej-s";42 compatible = "simple-bus";[all …]
1 // SPDX-License-Identifier: GPL-2.0+5 /dts-v1/;6 #include "imx23.dtsi"10 compatible = "fsl,imx23-evk", "fsl,imx23";17 reg_vddio_sd0: regulator-vddio-sd0 {18 compatible = "regulator-fixed";19 regulator-name = "vddio-sd0";20 regulator-min-microvolt = <3300000>;21 regulator-max-microvolt = <3300000>;25 reg_lcd_3v3: regulator-lcd-3v3 {[all …]
2 * Copyright (C) 2013-2016 Marek Vasut <marek.vasut@gmail.com>4 * This file is dual-licensed: you can use it either under the terms44 /dts-v1/;45 #include "imx23.dtsi"48 model = "Creative ZEN X-Fi3";49 compatible = "creative,x-fi3", "fsl,imx23";59 compatible = "fsl,imx23-mmc";60 pinctrl-names = "default";61 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;62 bus-width = <4>;[all …]
2 * Copyright (C) 2013-2016 Marek Vasut <marek.vasut@gmail.com>4 * This file is dual-licensed: you can use it either under the terms44 /dts-v1/;45 #include <dt-bindings/gpio/gpio.h>46 #include "imx23.dtsi"50 compatible = "sandisk,sansa_fuze_plus", "fsl,imx23";60 compatible = "fsl,imx23-mmc";61 pinctrl-names = "default";62 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>;63 bus-width = <4>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+5 #include <dt-bindings/gpio/gpio.h>6 #include "imx28-pinfunc.h"9 #address-cells = <1>;10 #size-cells = <1>;12 interrupt-parent = <&icoll>;15 * pre-existing /chosen node to be available to insert the42 #address-cells = <1>;43 #size-cells = <0>;46 compatible = "arm,arm926ej-s";[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)4 * Copyright 2017-2018 NXP.8 #include <dt-bindings/clock/imx6sll-clock.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include "imx6sll-pinfunc.h"14 #address-cells = <1>;15 #size-cells = <1>;44 #address-cells = <1>;45 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6ul-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include "imx6ul-pinfunc.h"12 #address-cells = <1>;13 #size-cells = <1>;16 * pre-existing /chosen node to be available to insert the55 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/interrupt-controller/irq.h>6 #include "imx6sl-pinfunc.h"7 #include <dt-bindings/clock/imx6sl-clock.h>10 #address-cells = <1>;11 #size-cells = <1>;14 * pre-existing /chosen node to be available to insert the47 #address-cells = <1>;48 #size-cells = <0>;51 compatible = "arm,cortex-a9";[all …]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6sx-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include "imx6sx-pinfunc.h"12 #address-cells = <1>;13 #size-cells = <1>;16 * pre-existing /chosen node to be available to insert the57 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/clock/imx6qdl-clock.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #address-cells = <1>;12 #size-cells = <1>;15 * pre-existing /chosen node to be available to insert the54 compatible = "fsl,imx-ckil", "fixed-clock";55 #clock-cells = <0>;56 clock-frequency = <32768>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pwm/mxs-pwm.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Freescale MXS PWM controller10 - Shawn Guo <shawnguo@kernel.org>11 - Anson Huang <anson.huang@nxp.com>16 - fsl,imx23-pwm21 "#pwm-cells":24 fsl,pwm-number:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/imx23-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Shawn Guo <shawnguo@kernel.org>18 ------------------49 pwm 3064 const: fsl,imx23-clkctrl69 '#clock-cells':73 - compatible[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later8 #include <linux/clk-provider.h>85 clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, enumerator102 dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl"); in mx23_clocks_init()142 clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29); in mx23_clocks_init()170 CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init);
1 // SPDX-License-Identifier: GPL-2.0+13 #include <linux/pwm.h>47 static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, in mxs_pwm_apply() argument58 * If the PWM channel is disabled, make sure to turn on the in mxs_pwm_apply()62 if (!pwm_is_enabled(pwm)) { in mxs_pwm_apply()63 ret = clk_prepare_enable(mxs->clk); in mxs_pwm_apply()68 if (!state->enabled && pwm_is_enabled(pwm)) in mxs_pwm_apply()69 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply()71 rate = clk_get_rate(mxs->clk); in mxs_pwm_apply()74 c = c * state->period; in mxs_pwm_apply()[all …]
9 #include <dt-bindings/clock/imx6ul-clock.h>10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/input/input.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include "imx6ul-pinfunc.h"53 #address-cells = <1>;54 #size-cells = <0>;57 compatible = "arm,cortex-a7";60 clock-latency = <61036>; /* two CLK32 periods */61 operating-points = <[all …]
9 #include <dt-bindings/clock/imx6sll-clock.h>10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include "imx6sll-pinfunc.h"43 #address-cells = <1>;44 #size-cells = <0>;47 compatible = "arm,cortex-a9";50 next-level-cache = <&L2>;51 operating-points = <58 fsl,soc-operating-points = <[all …]
10 #include <dt-bindings/interrupt-controller/irq.h>11 #include "imx6sl-pinfunc.h"12 #include <dt-bindings/clock/imx6sl-clock.h>15 #address-cells = <1>;16 #size-cells = <1>;19 * pre-existing /chosen node to be available to insert the21 * Also for U-Boot there must be a pre-existing /memory node.47 #address-cells = <1>;48 #size-cells = <0>;51 compatible = "arm,cortex-a9";[all …]
2 * Copyright 2015-2016 Freescale Semiconductor, Inc.9 #include <dt-bindings/clock/imx6ul-clock.h>10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include "imx6ull-pinfunc.h"13 #include "imx6ull-pinfunc-snvs.h"50 #address-cells = <1>;51 #size-cells = <0>;54 compatible = "arm,cortex-a7";57 clock-latency = <61036>; /* two CLK32 periods */[all …]
9 #include <dt-bindings/clock/imx6sx-clock.h>10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/input/input.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include "imx6sx-pinfunc.h"53 #address-cells = <1>;54 #size-cells = <0>;57 compatible = "arm,cortex-a9";60 next-level-cache = <&L2>;61 operating-points = <[all …]
9 * http://www.opensource.org/licenses/gpl-license.html13 #include <dt-bindings/clock/imx6qdl-clock.h>14 #include <dt-bindings/interrupt-controller/arm-gic.h>52 #address-cells = <1>;53 #size-cells = <0>;56 compatible = "fsl,imx-ckil", "fixed-clock";57 #clock-cells = <0>;58 clock-frequency = <32768>;62 compatible = "fsl,imx-ckih1", "fixed-clock";63 #clock-cells = <0>;[all …]
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