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/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-ipq806x.c2 * Qualcomm Atheros IPQ806x GMAC glue layer
93 static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed) in get_clk_div_sgmii() argument
95 struct device *dev = &gmac->pdev->dev; in get_clk_div_sgmii()
119 static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed) in get_clk_div_rgmii() argument
121 struct device *dev = &gmac->pdev->dev; in get_clk_div_rgmii()
145 static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed) in ipq806x_gmac_set_speed() argument
150 switch (gmac->phy_mode) { in ipq806x_gmac_set_speed()
152 div = get_clk_div_rgmii(gmac, speed); in ipq806x_gmac_set_speed()
153 clk_bits = NSS_COMMON_CLK_GATE_RGMII_RX_EN(gmac->id) | in ipq806x_gmac_set_speed()
154 NSS_COMMON_CLK_GATE_RGMII_TX_EN(gmac->id); in ipq806x_gmac_set_speed()
[all …]
H A Ddwmac-sunxi.c32 struct sunxi_priv_data *gmac = priv; in sun7i_gmac_init() local
35 if (gmac->regulator) { in sun7i_gmac_init()
36 ret = regulator_enable(gmac->regulator); in sun7i_gmac_init()
41 /* Set GMAC interface port mode in sun7i_gmac_init()
43 * The GMAC TX clock lines are configured by setting the clock in sun7i_gmac_init()
47 if (phy_interface_mode_is_rgmii(gmac->interface)) { in sun7i_gmac_init()
48 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_GMII_RGMII_RATE); in sun7i_gmac_init()
49 clk_prepare_enable(gmac->tx_clk); in sun7i_gmac_init()
50 gmac->clk_enabled = 1; in sun7i_gmac_init()
52 clk_set_rate(gmac->tx_clk, SUN7I_GMAC_MII_RATE); in sun7i_gmac_init()
[all …]
H A Ddwmac-anarion.c27 static uint32_t gmac_read_reg(struct anarion_gmac *gmac, uint8_t reg) in gmac_read_reg() argument
29 return readl((void *)(gmac->ctl_block + reg)); in gmac_read_reg()
32 static void gmac_write_reg(struct anarion_gmac *gmac, uint8_t reg, uint32_t val) in gmac_write_reg() argument
34 writel(val, (void *)(gmac->ctl_block + reg)); in gmac_write_reg()
40 struct anarion_gmac *gmac = priv; in anarion_gmac_init() local
43 gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 1); in anarion_gmac_init()
45 sw_config = gmac_read_reg(gmac, GMAC_SW_CONFIG_REG); in anarion_gmac_init()
47 sw_config |= (gmac->phy_intf_sel & GMAC_CONFIG_INTF_SEL_MASK); in anarion_gmac_init()
48 gmac_write_reg(gmac, GMAC_SW_CONFIG_REG, sw_config); in anarion_gmac_init()
50 gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 0); in anarion_gmac_init()
[all …]
H A Ddwmac-sun8i.c36 * @syscon_field reg_field for the syscon's gmac register
549 struct sunxi_priv_data *gmac = priv; in sun8i_dwmac_init() local
552 if (gmac->regulator) { in sun8i_dwmac_init()
553 ret = regulator_enable(gmac->regulator); in sun8i_dwmac_init()
560 ret = clk_prepare_enable(gmac->tx_clk); in sun8i_dwmac_init()
566 if (gmac->use_internal_phy) { in sun8i_dwmac_init()
575 clk_disable_unprepare(gmac->tx_clk); in sun8i_dwmac_init()
577 if (gmac->regulator) in sun8i_dwmac_init()
578 regulator_disable(gmac->regulator); in sun8i_dwmac_init()
745 struct sunxi_priv_data *gmac = priv->plat->bsp_priv; in get_ephy_nodes() local
[all …]
H A DKconfig81 tristate "Adaptrum Anarion GMAC support"
85 Support for Adaptrum Anarion GMAC Ethernet controller.
111 tristate "MediaTek MT27xx GMAC support"
114 Support for MediaTek GMAC Ethernet controller.
184 tristate "STi GMAC support"
193 SOCs GMAC ethernet controller.
205 SOCs GMAC ethernet controller.
208 tristate "Allwinner GMAC support"
212 Support for Allwinner A20/A31 GMAC ethernet controllers.
216 GMAC ethernet controller.
[all …]
H A Dhwif.c61 /* GMAC older than 3.50 has no extended descriptors */ in stmmac_dwmac1_quirks()
93 bool gmac; member
112 .gmac = false,
130 .gmac = true,
148 .gmac = false,
166 .gmac = false,
186 .gmac = false,
208 .gmac = false,
226 .gmac = false,
245 .gmac = false,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Drockchip-dwmac.yaml7 title: Rockchip 10/100/1000 Ethernet driver(GMAC)
18 - rockchip,px30-gmac
19 - rockchip,rk3128-gmac
20 - rockchip,rk3228-gmac
21 - rockchip,rk3288-gmac
22 - rockchip,rk3308-gmac
23 - rockchip,rk3328-gmac
24 - rockchip,rk3366-gmac
25 - rockchip,rk3368-gmac
26 - rockchip,rk3399-gmac
[all …]
H A Dhisilicon-hix5hd2-gmac.txt1 Hisilicon hix5hd2 gmac controller
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
43 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
H A Dsnps,dwmac.yaml35 - st,spear600-gmac
48 - allwinner,sun7i-a20-gmac
59 - rockchip,px30-gmac
60 - rockchip,rk3128-gmac
61 - rockchip,rk3228-gmac
62 - rockchip,rk3288-gmac
63 - rockchip,rk3328-gmac
64 - rockchip,rk3366-gmac
65 - rockchip,rk3368-gmac
66 - rockchip,rk3399-gmac
[all …]
H A Dallwinner,sun7i-a20-gmac.yaml4 $id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
7 title: Allwinner A20 GMAC Device Tree Bindings
18 const: allwinner,sun7i-a20-gmac
31 - description: GMAC main clock
56 gmac: ethernet@1c50000 {
57 compatible = "allwinner,sun7i-a20-gmac";
H A Dipq806x-dwmac.txt8 - compatible: should be "qcom,ipq806x-gmac" along with "snps,dwmac"
20 gmac: ethernet@37000000 {
22 compatible = "qcom,ipq806x-gmac";
/OK3568_Linux_fs/kernel/drivers/clk/sunxi/
H A Dclk-a20-gmac.c19 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
23 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core
24 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
28 * The external 125 MHz reference is optional, i.e. GMAC can use its
29 * internal TX clock just fine. The A31 GMAC clock module does not have
32 * To keep it simple, let the GMAC use either the MII TX clock for MII mode,
33 * and its internal TX clock for GMII and RGMII modes. The GMAC driver should
36 * Only the GMAC should use this clock. Altering the clock so that it doesn't
37 * match the GMAC's operation parameters will result in the GMAC not being
38 * able to send traffic out. The GMAC driver should set the clock rate and
[all …]
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/net/
H A Dallwinner,sun7i-a20-gmac.txt1 * Allwinner GMAC ethernet controller
7 - compatible: Should be "allwinner,sun7i-a20-gmac"
8 - clocks: Should contain the GMAC main clock, and tx clock
9 The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
18 gmac: ethernet@01c50000 {
19 compatible = "allwinner,sun7i-a20-gmac";
H A Dstmmac.txt1 * STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
5 For backwards compatibility: "st,spear600-gmac" is also supported.
38 - clocks: If present, the first clock should be the GMAC main clock,
51 compatible = "st,spear600-gmac";
/OK3568_Linux_fs/kernel/arch/mips/netlogic/xlr/
H A Dfmn-config.c91 total_credits += cfg->gmac[0].credit_config[bkt]; in check_credit_distribution()
92 total_credits += cfg->gmac[1].credit_config[bkt]; in check_credit_distribution()
183 struct xlr_fmn_info *gmac = xlr_board_fmn_config.gmac; in xlr_board_info_setup() local
197 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
207 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
222 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
224 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, in xlr_board_info_setup()
235 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
237 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, in xlr_board_info_setup()
249 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, in xlr_board_info_setup()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/cortina/
H A Dgemini.h2 /* Register definitions for Gemini GMAC Ethernet device driver
49 * GMAC 0/1 SW TX Q0-5, and GMAC 0/1 HW TX Q0-5
91 /* GMAC 0/1 DMA/TOE register */
145 /* GMAC Hash/Rx/Tx AHB Weighting register */
148 /* TOE GMAC 0/1 register */
332 /* GMAC DMA Control Register
366 /* GMAC Tx Weighting Control Register 0
386 /* GMAC Tx Weighting Control Register 1
410 /* GMAC DMA Tx Description Word 0 Register
434 /* GMAC DMA Tx Description Word 1 Register
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/dsa/
H A Dmt7530.txt45 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
47 Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to
53 GMAC of the SOC.
55 GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!
56 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
67 1. normal: The PHY can only connect to 2nd GMAC but not to the switch
69 a ethernet port. But can't interface to the 2nd GMAC.
73 Driver tries to lookup the phy-handle of the 2nd GMAC of the master device.
139 Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4.
205 /* Commented out. Port 4 is handled by 2nd GMAC.
/OK3568_Linux_fs/kernel/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_mac.h221 u64 rx_bad_bytes; /* only for gmac */
228 u64 rx_minto64; /* only for gmac */
240 u64 rx_vlan_pkts; /* only for gmac */
241 u64 rx_data_err; /* only for gmac */
242 u64 rx_align_err; /* only for gmac */
243 u64 rx_long_err; /* only for gmac */
253 u64 rx_filter_pkts; /* only for gmac */
254 u64 rx_filter_bytes; /* only for gmac */
255 u64 rx_fifo_overrun_err;/* only for gmac */
256 u64 rx_len_err; /* only for gmac */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun7i-a20-gmac-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml#
7 title: Allwinner A20 GMAC TX Clock Device Tree Bindings
18 const: allwinner,sun7i-a20-gmac-clk
45 compatible = "allwinner,sun7i-a20-gmac-clk";
/OK3568_Linux_fs/kernel/drivers/pinctrl/sunxi/
H A Dpinctrl-sun6i-a31.c25 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
33 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
41 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
49 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
57 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
65 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
73 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
81 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
89 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
96 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
[all …]
H A Dpinctrl-sun8i-a83t.c186 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD3 */
191 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD2 */
196 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD1 */
201 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD0 */
206 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXCK */
211 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXDV */
216 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXERR */
221 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD3 */
226 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD2 */
231 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD1 */
[all …]
H A Dpinctrl-sun9i-a80.c25 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
31 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
37 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
43 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
49 SUNXI_FUNCTION(0x2, "gmac"), /* RXCK */
55 SUNXI_FUNCTION(0x2, "gmac"), /* RXCTL */
61 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
67 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
73 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
79 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
[all …]
/OK3568_Linux_fs/external/dpdk/gmac/kernel5.10/
H A Dkernel_dts.diff31 + compatible = "rockchip,uio-gmac";
38 compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
45 + compatible = "rockchip,uio-gmac";
52 compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
/OK3568_Linux_fs/external/dpdk/gmac/kernel4.19/
H A Dkernel_dts.diff31 + compatible = "rockchip,uio-gmac";
38 compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
45 + compatible = "rockchip,uio-gmac";
52 compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
/OK3568_Linux_fs/kernel/drivers/staging/netlogic/
H A Dplatform_net.c52 res->name = "gmac"; in xlr_resource_init()
59 res->name = "gmac"; in xlr_resource_init()
72 .gmac_fmn_info = &xlr_board_fmn_config.gmac[1], in gmac_controller2_init()
116 .gmac_fmn_info = &xlr_board_fmn_config.gmac[0], in xls_gmac_init()
182 .gmac_fmn_info = &xlr_board_fmn_config.gmac[0], in xlr_gmac_init()

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