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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
[all …]
H A Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include "hi3660-drm.dtsi"
14 #include "hi3660-gpu.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/usb/pd.h>
23 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/reset/
H A Dgpio-poweroff.txt1 Driver a GPIO line that can be used to turn the power off.
4 At driver load time, the driver will request the given gpio line and
6 'input' is not found, the GPIO line will be driven in the inactive
9 When the power-off handler is called, the gpio is configured as an
11 condition. This will also cause an inactive->active edge condition, so
12 triggering positive edge triggered power off. After a delay of 100ms,
13 the GPIO is set to inactive, thus causing an active->inactive edge,
15 delay the GPIO is driver active again. If the power is still on and
16 the CPU still running after a 3000ms delay, a WARN_ON(1) is emitted.
19 - compatible : should be "gpio-poweroff".
[all …]
H A Dgpio-restart.txt1 Drive a GPIO line that can be used to restart the system from a restart
5 time, the driver will request the given gpio line and install a restart
6 handler. If the optional properties 'open-source' is not found, the GPIO line
13 inactive->active edge condition, triggering positive edge triggered
14 reset. After a delay specified by active-delay, the GPIO is set to
15 inactive, thus causing an active->inactive edge, triggering negative edge
16 triggered reset. After a delay specified by inactive-delay, the GPIO
17 is driven active again. After a delay specified by wait-delay, the
21 - compatible : should be "gpio-restart".
22 - gpios : The GPIO to set high/low, see "gpios property" in
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sti/
H A Dsti_vtg.c1 // SPDX-License-Identifier: GPL-2.0
67 /* Delay introduced by the HDMI in nb of pixel */
70 /* Delay introduced by the DVO in nb of pixel */
73 /* delay introduced by the Arbitrary Waveform Generator in nb of pixels */
74 #define AWG_DELAY_HD (-9)
75 #define AWG_DELAY_ED (-8)
76 #define AWG_DELAY_SD (-7)
111 *@vsync_line_top: vertical top field line number falling and rising edge
112 *@vsync_line_bot: vertical bottom field line number falling and rising edge
156 writel(1, vtg->regs + VTG_DRST_AUTOC); in vtg_reset()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
[all …]
H A Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
16 "enable" - gate clock which used for enabling/disabling the device (required)
17 "2x_enable" - gate clock controlling the device for some special platforms (optional)
[all …]
H A Dexynos-dw-mshc.txt7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
[all …]
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
37 broken-cd:
42 cd-gpios:
46 non-removable:
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dlpddr2.h2 * (C) Copyright 2015-2016, Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
47 #define MMDC_MPMUR0_VALUE 0x00000800 /* Force delay line initialisation */
56 #define MMDC_MPRDDLCTL_MODULE0_VALUE 0x4D4B4F4B /* Read delay line offsets */
57 #define MMDC_MPWRDLCTL_MODULE0_VALUE 0x38383737 /* Write delay line offsets */
61 #define MMDC_MPRDDLCTL_MODULE1_VALUE 0x4D4B4F4B /* Read delay line offsets */
62 #define MMDC_MPWRDLCTL_MODULE1_VALUE 0x38383737 /* Write delay line offsets */
65 #define MMDC_MDRWD_VALUE 0x0F9F26D2 /* Read/write command delay - default used */
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sunxi_dw.h4 * (C) Copyright 2007-2015 Allwinner Technology Co.
7 * (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com>
10 * SPDX-License-Identifier: GPL-2.0+
62 #define MCTL_CR_PAGE_SIZE(x) ((fls(x) - 4) << 8)
63 #define MCTL_CR_ROW_BITS(x) (((x) - 1) << 4)
75 * As address line A15 and CS1 chip select for rank 1 are muxed on the same
129 u32 acmdlr; /* 0x200 AC master delay line register */
130 u32 aclcdlr; /* 0x204 AC local calibrated delay line register */
133 u32 acbdlr[31]; /* 0x210 AC bit delay line registers */
136 u32 mdlr; /* 0x00 master delay line register */
[all …]
/OK3568_Linux_fs/yocto/poky/meta/lib/oeqa/selftest/cases/
H A Dbuildoptions.py2 # SPDX-License-Identifier: MIT
21 bitbake("-c clean core-image-minimal")
23 self.append_config('IMAGE_FEATURES += "ssh-server-openssh"')
24 bitbake("core-image-minimal")
25 … log_data_file = os.path.join(get_bb_var("WORKDIR", "core-image-minimal"), "temp/log.do_rootfs")
27 …incremental_created = re.search(r"Installing\s*:\s*packagegroup-core-ssh-openssh", log_data_create…
28 self.remove_config('IMAGE_FEATURES += "ssh-server-openssh"')
30 bitbake("core-image-minimal")
32 … incremental_removed = re.search(r"Erasing\s*:\s*packagegroup-core-ssh-openssh", log_data_removed)
36 bitbake("ccache-native")
[all …]
/OK3568_Linux_fs/kernel/drivers/w1/masters/
H A Dw1-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * w1-gpio - GPIO w1 bus master driver
12 #include <linux/w1-gpio.h>
17 #include <linux/delay.h>
21 static u8 w1_gpio_set_pullup(void *data, int delay) in w1_gpio_set_pullup() argument
25 if (delay) { in w1_gpio_set_pullup()
26 pdata->pullup_duration = delay; in w1_gpio_set_pullup()
28 if (pdata->pullup_duration) { in w1_gpio_set_pullup()
30 * This will OVERRIDE open drain emulation and force-pull in w1_gpio_set_pullup()
31 * the line high for some time. in w1_gpio_set_pullup()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
24 #address-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dgemini-sq201.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
32 wakeup-source;
[all …]
H A Dgemini-sl93512r.dts1 // SPDX-License-Identifier: GPL-2.0
5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
9 /dts-v1/;
12 #include <dt-bindings/input/input.h>
15 model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = &uart0;
32 compatible = "gpio-keys";
34 button-wps {
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/dram/
H A Dcmd_ddrphy.c3 * Copyright (C) 2015-2017 Socionext Inc.
6 * SPDX-License-Identifier: GPL-2.0+
13 #include "../soc-info.h"
14 #include "ddrphy-regs.h"
90 for (phy = 0; phy < param->nr_phy; phy++) { in dump_loop()
91 phy_base = ioremap(param->phy[phy].base, SZ_4K); in dump_loop()
94 for (dx = 0; dx < param->phy[phy].nr_dx; dx++) { in dump_loop()
116 printf("\n--- Write Bit Delay Line ---\n"); in wbdl_dump()
133 printf("\n--- Read Bit Delay Line ---\n"); in rbdl_dump()
146 u32 wld = (lcdlr0 >> (8 * rank)) & 0xff; /* Delay */ in __wld_dump()
[all …]
H A Dcmd_ddrmphy.c2 * Copyright (C) 2015-2017 Socionext Inc.
5 * SPDX-License-Identifier: GPL-2.0+
12 #include "../soc-info.h"
13 #include "ddrmphy-regs.h"
75 for (phy = 0; phy < param->nr_phy; phy++) { in dump_loop()
76 phy_base = ioremap(param->phy[phy].base, SZ_4K); in dump_loop()
79 for (dx = 0; dx < param->phy[phy].nr_dx; dx++) { in dump_loop()
96 printf("\n--- Impedance Data ---\n"); in zq_dump()
99 for (phy = 0; phy < param->nr_phy; phy++) { in zq_dump()
100 phy_base = ioremap(param->phy[phy].base, SZ_4K); in zq_dump()
[all …]
/OK3568_Linux_fs/kernel/drivers/input/sensors/compass/
H A Dak09918.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Wang Jie <dave.wang@rock-chips.com>
17 #include <linux/delay.h>
25 #include <linux/sensor-dev.h>
109 sensor->ops->ctrl_data = AK09918_MODE_SNG_MEASURE; in sensor_active()
111 sensor->ops->ctrl_data = AK09918_MODE_POWERDOWN; in sensor_active()
114 sensor->ops->ctrl_reg, sensor->ops->ctrl_data); in sensor_active()
116 dev_err(&client->dev, in sensor_active()
130 result = sensor->ops->active(client, 0, 0); in sensor_init()
132 dev_err(&client->dev, "%s: line= %d, result = %d\n", in sensor_init()
[all …]
/OK3568_Linux_fs/kernel/tools/kvm/kvm_stat/
H A Dkvm_stat2 # SPDX-License-Identifier: GPL-2.0-only
4 # top-like utility for displaying kvm statistics
6 # Copyright 2006-2008 Qumranet Technologies
7 # Copyright 2008-2011 Red Hat, Inc.
15 - as a top-like text ui
16 - in a key -> value format
17 - in an all keys, all values format
257 for line in open('/proc/cpuinfo'):
258 if not line.startswith('flags'):
261 flags = line.split()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/serial/
H A Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Ditlb_miss.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* ITLB ** ICACHE line 1: Context 0 check and TSB load */
8 srlx %g6, 22, %g6 ! Delay slot
12 /* ITLB ** ICACHE line 2: TSB compare and TLB load */
18 nop ! Delay slot, fill me
22 /* ITLB ** ICACHE line 3: */
32 /* ITLB ** ICACHE line 4: */
/OK3568_Linux_fs/kernel/drivers/tty/serial/8250/
H A D8250_fsl.c1 // SPDX-License-Identifier: GPL-2.0
15 * We re-use the already existing "bug handling" lsr_saved_flags
27 int line; member
37 spin_lock_irqsave(&up->port.lock, flags); in fsl8250_handle_irq()
39 iir = port->serial_in(port, UART_IIR); in fsl8250_handle_irq()
41 spin_unlock_irqrestore(&up->port.lock, flags); in fsl8250_handle_irq()
46 if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) { in fsl8250_handle_irq()
47 up->lsr_saved_flags &= ~UART_LSR_BI; in fsl8250_handle_irq()
48 port->serial_in(port, UART_RX); in fsl8250_handle_irq()
49 spin_unlock_irqrestore(&up->port.lock, flags); in fsl8250_handle_irq()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/most/i2c/
H A Di2c.c1 // SPDX-License-Identifier: GPL-2.0
3 * i2c.c - Hardware Dependent Module for I2C Interface
5 * Copyright (C) 2013-2015, Microchip Technology Germany II GmbH & Co. KG
24 * list_first_mbo - get the first mbo from a list
42 unsigned int delay; member
53 * configure_channel - called from MOST core to configure a channel
69 unsigned int delay, pr; in configure_channel() local
73 if (channel_config->data_type != MOST_CH_CONTROL) { in configure_channel()
75 return -EPERM; in configure_channel()
78 if (channel_config->direction != dev->capabilities[ch_idx].direction) { in configure_channel()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/
H A Dorion-nand.txt4 - compatible : "marvell,orion-nand".
5 - reg : Base physical address of the NAND and length of memory mapped
9 - cle : Address line number connected to CLE. Default is 0
10 - ale : Address line number connected to ALE. Default is 1
11 - bank-width : Width in bytes of the device. Default is 1
12 - chip-delay : Chip dependent delay for transferring data from array to read
15 The device tree may optionally contain sub-nodes describing partitions of the
21 #address-cells = <1>;
22 #size-cells = <1>;
25 bank-width = <1>;
[all …]

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