Searched +full:cpg +full:- +full:mstp +full:- +full:clocks (Results 1 – 16 of 16) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/renesas,cpg-mstp-clocks.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks10 - Geert Uytterhoeven <geert+renesas@glider.be>13 The Clock Pulse Generator (CPG) can gate SoC device clocks. The gates are16 This device tree binding describes a single 32 gate clocks group per node.17 Clocks are referenced by user nodes by the Module Stop (MSTP) node phandle23 - enum:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/renesas,cpg-clocks.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas Clock Pulse Generator (CPG)10 - Geert Uytterhoeven <geert+renesas@glider.be>13 The Clock Pulse Generator (CPG) generates core clocks for the SoC. It16 The CPG may also provide a Clock Domain for SoC devices, in combination with17 the CPG Module Stop (MSTP) Clocks.22 - const: renesas,r8a73a4-cpg-clocks # R-Mobile APE6[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2013-14 Renesas Solutions Corp.6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>9 #include <dt-bindings/clock/r7s72100-clock.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>15 #address-cells = <1>;16 #size-cells = <1>;30 /* Fixed factor clocks */32 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC8 #include <dt-bindings/clock/r8a7740-clock.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>14 interrupt-parent = <&gic>;15 #address-cells = <1>;16 #size-cells = <1>;19 #address-cells = <1>;20 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC8 #include <dt-bindings/clock/sh73a0-clock.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>14 interrupt-parent = <&gic>;15 #address-cells = <1>;16 #size-cells = <1>;19 #address-cells = <1>;20 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.09 #include <dt-bindings/clock/r8a73a4-clock.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>15 interrupt-parent = <&gic>;16 #address-cells = <2>;17 #size-cells = <2>;20 #address-cells = <1>;21 #size-cells = <0>;25 compatible = "arm,cortex-a15";[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Car M1A (R8A77781) SoC14 #include <dt-bindings/clock/r8a7778-clock.h>15 #include <dt-bindings/interrupt-controller/arm-gic.h>16 #include <dt-bindings/interrupt-controller/irq.h>20 interrupt-parent = <&gic>;21 #address-cells = <1>;22 #size-cells = <1>;25 #address-cells = <1>;26 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Car H1 (R8A77790) SoC9 #include <dt-bindings/clock/r8a7779-clock.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/power/r8a7779-sysc.h>16 interrupt-parent = <&gic>;17 #address-cells = <1>;18 #size-cells = <1>;21 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * R-Car MSTP clocks12 #include <linux/clk-provider.h>24 * MSTP clocks. We can't use standard gate clocks as we need to poll on the31 * struct mstp_clock_group - MSTP gating clocks group33 * @data: clock specifier translation for clocks in this group37 * @width_8bit: registers are 8-bit, not 32-bit38 * @clks: clocks in this group50 * struct mstp_clock - MSTP gating clock51 * @hw: handle between common and hardware-specific interfaces[all …]
1 // SPDX-License-Identifier: GPL-2.07 * Based on clk-mstp.c, clk-rcar-gen2.c, and clk-rcar-gen3.c14 #include <linux/clk-provider.h>28 #include <linux/reset-controller.h>31 #include <dt-bindings/clock/renesas-cpg-mssr.h>33 #include "renesas-cpg-mssr.h"34 #include "clk-div6.h"46 * If the registers exist, these are valid for SH-Mobile, R-Mobile,47 * R-Car Gen2, R-Car Gen3, and RZ/G1.48 * These are NOT valid for R-Car Gen1 and RZ/A1![all …]
1 # SPDX-License-Identifier: GPL-2.03 obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o4 obj-$(CONFIG_CLK_RZA1) += clk-rz.o5 obj-$(CONFIG_CLK_R7S9210) += r7s9210-cpg-mssr.o6 obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o7 obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o8 obj-$(CONFIG_CLK_R8A7742) += r8a7742-cpg-mssr.o9 obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o10 obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o11 obj-$(CONFIG_CLK_R8A77470) += r8a77470-cpg-mssr.o[all …]
1 # SPDX-License-Identifier: GPL-2.052 bool "R-Mobile APE6 clock support" if COMPILE_TEST57 bool "R-Mobile A1 clock support" if COMPILE_TEST94 bool "R-Car M1A clock support" if COMPILE_TEST98 bool "R-Car H1 clock support" if COMPILE_TEST102 bool "R-Car H2 clock support" if COMPILE_TEST106 bool "R-Car M2-W/N clock support" if COMPILE_TEST110 bool "R-Car V2H clock support" if COMPILE_TEST114 bool "R-Car E2 clock support" if COMPILE_TEST118 bool "R-Car H3 clock support" if COMPILE_TEST[all …]
2 * Renesas RCar Gen3 R8A7795/R8A7796 CPG MSSR driver11 * SPDX-License-Identifier: GPL-2.0+15 #include <clk-uclass.h>21 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>22 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>33 * If the registers exist, these are valid for SH-Mobile, R-Mobile,34 * R-Car Gen2, R-Car Gen3, and RZ/G1.35 * These are NOT valid for R-Car Gen1 and RZ/A1!63 #define RMSTPCR(i) (smstpcr[i] - 0x20)83 * Definitions of CPG Core Clocks[all …]
1 // SPDX-License-Identifier: GPL-2.03 * R-Car SYSC Power management support6 * Copyright (C) 2015-2017 Glider bvba18 #include <linux/soc/renesas/rcar-sysc.h>20 #include "rcar-sysc.h"36 * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen237 * Use PSCI on R-Car Gen356 #define RCAR_PD_ALWAYS_ON 32 /* Always-on power area */89 return -EAGAIN; in rcar_sysc_pwr_on_off()92 iowrite32(BIT(sysc_ch->chan_bit), in rcar_sysc_pwr_on_off()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Low-Level PCI Express Support for the SH77865 * Copyright (C) 2009 - 2011 Paul Mundt15 #include <linux/dma-mapping.h>21 #include "pcie-sh7786.h"47 .end = 0xfd000000 + SZ_8M - 1,52 .end = 0xc0000000 + SZ_512M - 1,57 .end = 0x10000000 + SZ_64M - 1,62 .end = 0xfe100000 + SZ_1M - 1,71 .end = 0xfd800000 + SZ_8M - 1,[all …]
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