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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM memory mapped architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
14 ARM cores may have a memory mapped architected timer, which provides up to 8
15 frames with a physical and optional virtual timer per frame.
17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
[all …]
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Darm_arch_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
88 * Architected system timer support.
96 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write() local
99 writel_relaxed(val, timer->base + CNTP_CTL); in arch_timer_reg_write()
102 writel_relaxed(val, timer->base + CNTP_TVAL); in arch_timer_reg_write()
106 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_write() local
109 writel_relaxed(val, timer->base + CNTV_CTL); in arch_timer_reg_write()
112 writel_relaxed(val, timer->base + CNTV_TVAL); in arch_timer_reg_write()
127 struct arch_timer *timer = to_arch_timer(clk); in arch_timer_reg_read() local
130 val = readl_relaxed(timer->base + CNTP_CTL); in arch_timer_reg_read()
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
31 compatible = "arm,cortex-m3";
40 compatible = "fixed-clock";
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H A Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-h3-h5.dtsi"
44 #include <dt-bindings/thermal/thermal.h>
47 cpu0_opp_table: opp-table-cpu {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dsdm660.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
11 interrupt-parent = <&intc>;
13 #address-cells = <2>;
14 #size-cells = <2>;
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <19200000>;
23 clock-output-names = "xo_board";
[all …]
H A Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
20 xo_board: xo-board {
21 compatible = "fixed-clock";
[all …]
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
H A Dmsm8992.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
9 interrupt-parent = <&intc>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a53";
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/
H A D.suspend.o.cmd
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D.rk3128-evb.dtb.dts.tmp
/OK3568_Linux_fs/u-boot/spl/drivers/spi/
H A D.spi-mem.o.cmd
/OK3568_Linux_fs/u-boot/drivers/spi/
H A D.spi-mem.o.cmd
/OK3568_Linux_fs/u-boot/cmd/
H A D.mem.o.cmd
/OK3568_Linux_fs/u-boot/tpl/arch/arm/lib/
H A D.psci-dt.o.cmd
H A D.bootm-fdt.o.cmd
/OK3568_Linux_fs/u-boot/spl/arch/arm/lib/
H A D.psci-dt.o.cmd
H A D.bootm-fdt.o.cmd
/OK3568_Linux_fs/u-boot/arch/arm/lib/
H A D.psci-dt.o.cmd
H A D.bootm-fdt.o.cmd
H A D.bootm.o.cmd
/OK3568_Linux_fs/u-boot/drivers/usb/host/
H A D.xhci-mem.o.cmd
/OK3568_Linux_fs/kernel/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
131 The ARM series is a line of low-power-consumption RISC chip designs
133 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
134 manufactured, but legacy ARM-based PC hardware remains popular in
244 Patch phys-to-virt and virt-to-phys translation functions at
248 This can only be used with non-XIP MMU kernels where the base
294 bool "MMU-based Paged Memory Management Support"
297 Select if you want MMU-based virtualised addressing space
336 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
349 bool "EBSA-110"
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/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dcpu.c4 * SPDX-License-Identifier: GPL-2.0+
121 * The base address of TTLB is gd->arch.tlb_addr. We use two
122 * levels of translation tables here to cover 40-bit address space.
128 * ------- <---- 0GB
131 * |-------| <---- 0x24000000
133 * |-------| <---- 0x300000000
135 * |-------| <---- 0x34000000
137 * |-------| <---- 0x40000000
139 * |-------| <---- 0x80000000 DDR0 space start
143 * ------- <---- 4GB DDR0 space end
[all …]

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