xref: /optee_os/core/drivers/versal_pmc.c (revision 03d6625f3e28dac6361138575ab7090c2c6853d4)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (C) 2022 Foundries.io Ltd
4  * Jorge Ramirez-Ortiz <jorge@foundries.io>
5  *
6  * Copyright (C) 2023 ProvenRun S.A.S
7  */
8 
9 #include <config.h>
10 #include <drivers/versal_pmc.h>
11 #include <initcall.h>
12 
13 #ifdef CFG_VERSAL_TRACE_PMC
14 static const char *const nvm_id[] = {
15 	[0] = "API_FEATURES",
16 	[1] = "BBRAM_WRITE_AES_KEY",
17 	[2] = "BBRAM_ZEROIZE",
18 	[3] = "BBRAM_WRITE_USER_DATA",
19 	[4] = "BBRAM_READ_USER_DATA",
20 	[5] = "BBRAM_LOCK_WRITE_USER_DATA",
21 #if defined(PLATFORM_FLAVOR_net)
22 	[6] = "BBRAM_WRITE_AES_KEY_FROM_PLOAD",
23 	[7] = "EFUSE_WRITE_AES_KEY",
24 	[8] = "EFUSE_WRITE_AES_KEY_FROM_PLOAD",
25 	[9] = "EFUSE_WRITE_PPK_HASH",
26 	[10] = "EFUSE_WRITE_PPK_HASH_FROM_PLOAD",
27 	[11] = "EFUSE_WRITE_IV",
28 	[12] = "EFUSE_WRITE_IV_FROM_PLOAD",
29 	[13] = "EFUSE_WRITE_GLITCH_CONFIG",
30 	[14] = "EFUSE_WRITE_DEC_ONLY",
31 	[15] = "EFUSE_WRITE_REVOCATION_ID",
32 	[16] = "EFUSE_WRITE_OFFCHIP_REVOKE_ID",
33 	[17] = "EFUSE_WRITE_MISC_CTRL_BITS",
34 	[18] = "EFUSE_WRITE_SEC_CTRL_BITS",
35 	[19] = "EFUSE_WRITE_MISC1_CTRL_BITS",
36 	[20] = "EFUSE_WRITE_BOOT_ENV_CTRL_BITS",
37 	[21] = "EFUSE_WRITE_FIPS_INFO",
38 	[22] = "EFUSE_WRITE_UDS_FROM_PLOAD",
39 	[23] = "EFUSE_WRITE_DME_KEY_FROM_PLOAD",
40 	[24] = "EFUSE_WRITE_DME_REVOKE",
41 	[25] = "EFUSE_WRITE_PLM_UPDATE",
42 	[26] = "EFUSE_WRITE_BOOT_MODE_DISABLE",
43 	[27] = "EFUSE_WRITE_CRC",
44 	[28] = "EFUSE_WRITE_DME_MODE",
45 	[29] = "EFUSE_WRITE_PUF_HD_FROM_PLOAD",
46 	[30] = "EFUSE_WRITE_PUF",
47 	[31] = "EFUSE_WRITE_ROM_RSVD",
48 	[32] = "EFUSE_WRITE_PUF_CTRL_BITS",
49 	[33] = "EFUSE_READ_CACHE",
50 	[34] = "EFUSE_RELOAD_N_PRGM_PROT_BITS",
51 	[35] = "EFUSE_INVALID",
52 #else
53 	[6] = "EFUSE_WRITE",
54 	[7] = "EFUSE_WRITE_PUF",
55 	[8] = "EFUSE_PUF_USER_FUSE_WRITE",
56 	[9] = "EFUSE_READ_IV",
57 	[10] = "EFUSE_READ_REVOCATION_ID",
58 	[11] = "EFUSE_READ_OFFCHIP_REVOCATION_ID",
59 	[12] = "EFUSE_READ_USER_FUSES",
60 	[13] = "EFUSE_READ_MISC_CTRL",
61 	[14] = "EFUSE_READ_SEC_CTRL",
62 	[15] = "EFUSE_READ_SEC_MISC1",
63 	[16] = "EFUSE_READ_BOOT_ENV_CTRL",
64 	[17] = "EFUSE_READ_PUF_SEC_CTRL",
65 	[18] = "EFUSE_READ_PPK_HASH",
66 	[19] = "EFUSE_READ_DEC_EFUSE_ONLY",
67 	[20] = "EFUSE_READ_DNA",
68 	[21] = "EFUSE_READ_PUF_USER_FUSES",
69 	[22] = "EFUSE_READ_PUF",
70 	[23] = "EFUSE_INVALID",
71 #endif
72 };
73 
74 static const char *const crypto_id[] = {
75 	[0] = "FEATURES",
76 	[1] = "RSA_SIGN_VERIFY",
77 	[2] = "RSA_PUBLIC_ENCRYPT",
78 	[3] = "RSA_PRIVATE_DECRYPT",
79 	[4] = "SHA3_UPDATE",
80 	[5] = "ELLIPTIC_GENERATE_PUBLIC_KEY",
81 	[6] = "ELLIPTIC_GENERATE_SIGN",
82 	[7] = "ELLIPTIC_VALIDATE_PUBLIC_KEY",
83 	[8] = "ELLIPTIC_VERIFY_SIGN",
84 	[9] = "AES_INIT",
85 	[10] = "AES_OP_INIT",
86 	[11] = "AES_UPDATE_AAD",
87 	[12] = "AES_ENCRYPT_UPDATE",
88 	[13] = "AES_ENCRYPT_FINAL",
89 	[14] = "AES_DECRYPT_UPDATE",
90 	[15] = "AES_DECRYPT_FINAL",
91 	[16] = "AES_KEY_ZERO",
92 	[17] = "AES_WRITE_KEY",
93 	[18] = "AES_LOCK_USER_KEY",
94 	[19] = "AES_KEK_DECRYPT",
95 	[20] = "AES_SET_DPA_CM",
96 	[21] = "KAT",
97 	[22] = "TRNG_GENERATE",
98 	[23] = "AES_PERFORM_OPERATION",
99 	[24] = "MAX",
100 };
101 
102 static const char *const puf_id[] = {
103 	[0] = "PUF_API_FEATURES",
104 	[1] = "PUF_REGISTRATION",
105 	[2] = "PUF_REGENERATION",
106 	[3] = "PUF_CLEAR_PUF_ID",
107 };
108 
109 static const char *const module[] = {
110 	[5] = "CRYPTO",
111 	[7] = "FPGA",
112 	[11] = "NVM",
113 	[12] = "PUF",
114 	[13] = "OCP",
115 };
116 
117 static const char *const fpga_id[] = {
118 	[1] = "LOAD",
119 };
120 
121 static const char *const ocp_id[] = {
122 	[0] = "API_FEATURES",
123 	[1] = "EXTEND_HWPCR",
124 	[2] = "GET_HWPCR",
125 	[3] = "GET_HWPCRLOG",
126 	[4] = "GENDMERESP",
127 	[5] = "DEVAKINPUT",
128 	[6] = "GETCERTUSERCFG",
129 	[7] = "GETX509CERT",
130 	[8] = "ATTESTWITHDEVAK",
131 	[9] = "SET_SWPCRCONFIG",
132 	[10] = "EXTEND_SWPCR",
133 	[11] = "GET_SWPCR",
134 	[12] = "GET_SWPCRLOG",
135 	[13] = "GET_SWPCRDATA",
136 	[14] = "GEN_SHARED_SECRET",
137 	[15] = "ATTEST_WITH_KEYWRAP_DEVAK",
138 	[16] = "API_MAX",
139 };
140 
versal_pmc_call_trace(uint32_t call)141 static void versal_pmc_call_trace(uint32_t call)
142 {
143 	uint32_t mid = call >>  8 & 0xff;
144 	uint32_t api = call & 0xff;
145 	const char *val = NULL;
146 
147 	switch (mid) {
148 	case 5:
149 		if (api < ARRAY_SIZE(crypto_id))
150 			val = crypto_id[api];
151 
152 		break;
153 	case 7:
154 		if (api < ARRAY_SIZE(fpga_id))
155 			val = fpga_id[api];
156 
157 		break;
158 	case 11:
159 		if (api < ARRAY_SIZE(nvm_id))
160 			val = nvm_id[api];
161 
162 		break;
163 	case 12:
164 		if (api < ARRAY_SIZE(puf_id))
165 			val = puf_id[api];
166 
167 		break;
168 	case 13:
169 		if (api < ARRAY_SIZE(ocp_id))
170 			val = ocp_id[api];
171 
172 		break;
173 	default:
174 		break;
175 	}
176 
177 	IMSG("--- pmc: service: %s\t call: %s", module[mid],
178 	     val ? val : "Invalid");
179 };
180 #else
versal_pmc_call_trace(uint32_t call __unused)181 static void versal_pmc_call_trace(uint32_t call __unused)
182 {}
183 #endif
184 
185 static struct versal_ipi ipi_pmc;
186 
versal_pmc_notify(struct versal_ipi_cmd * cmd,struct versal_ipi_cmd * rsp,uint32_t * err)187 TEE_Result versal_pmc_notify(struct versal_ipi_cmd *cmd,
188 			     struct versal_ipi_cmd *rsp, uint32_t *err)
189 {
190 	TEE_Result ret = TEE_SUCCESS;
191 
192 	if (IS_ENABLED(CFG_VERSAL_TRACE_PMC))
193 		versal_pmc_call_trace(cmd->data[0]);
194 
195 	ret = versal_mbox_notify(&ipi_pmc, cmd, rsp, err);
196 	if (ret && err) {
197 		/*
198 		 * Check the remote code (FSBL repository) in xplmi_status.h
199 		 * and the relevant service error (ie, xsecure_error.h) for
200 		 * detailed information.
201 		 */
202 		DMSG("PLM: plm status = 0x%" PRIx32 ", lib_status = 0x%" PRIx32,
203 		     (*err & 0xFFFF0000) >> 16,
204 		     (*err & 0x0000FFFF));
205 
206 		ret = TEE_ERROR_GENERIC;
207 	}
208 
209 	return ret;
210 }
211 
versal_pmc_init(void)212 static TEE_Result versal_pmc_init(void)
213 {
214 	uint32_t lcl = 0;
215 
216 	switch (CFG_VERSAL_PMC_IPI_ID) {
217 	case 0:
218 		lcl = VERSAL_IPI_ID_0;
219 		break;
220 	case 1:
221 		lcl = VERSAL_IPI_ID_1;
222 		break;
223 	case 2:
224 		lcl = VERSAL_IPI_ID_2;
225 		break;
226 	case 3:
227 		lcl = VERSAL_IPI_ID_3;
228 		break;
229 	case 4:
230 		lcl = VERSAL_IPI_ID_4;
231 		break;
232 	case 5:
233 		lcl = VERSAL_IPI_ID_5;
234 		break;
235 	default:
236 		EMSG("Invalid IPI requested");
237 		return TEE_ERROR_GENERIC;
238 	}
239 
240 	return versal_mbox_open(lcl, VERSAL_IPI_ID_PMC, &ipi_pmc);
241 }
242 early_init(versal_pmc_init);
243