1 /*
2 * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7
8 /*******************************************************************************
9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
10 * plug-in component to the Secure Monitor, registered as a runtime service. The
11 * SPD is expected to be a functional extension of the Secure Payload (SP) that
12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
13 * the Trusted OS/Applications range to the dispatcher. The SPD will either
14 * handle the request locally or delegate it to the Secure Payload. It is also
15 * responsible for initialising and maintaining communication with the SP.
16 ******************************************************************************/
17 #include <assert.h>
18 #include <errno.h>
19 #include <inttypes.h>
20 #include <stddef.h>
21
22 #include <arch_helpers.h>
23 #include <bl31/bl31.h>
24 #include <common/bl_common.h>
25 #include <common/debug.h>
26 #include <common/runtime_svc.h>
27 #include <lib/coreboot.h>
28 #include <lib/el3_runtime/context_mgmt.h>
29 #include <lib/optee_utils.h>
30 #if TRANSFER_LIST
31 #include <transfer_list.h>
32 #endif
33 #include <lib/xlat_tables/xlat_tables_v2.h>
34 #if OPTEE_ALLOW_SMC_LOAD
35 #include <libfdt.h>
36 #endif /* OPTEE_ALLOW_SMC_LOAD */
37 #include <plat/common/platform.h>
38 #include <services/oem/chromeos/widevine_smc_handlers.h>
39 #include <tools_share/uuid.h>
40
41 #include "opteed_private.h"
42 #include "teesmc_opteed.h"
43
44 #if OPTEE_ALLOW_SMC_LOAD
45 static struct transfer_list_header __maybe_unused *bl31_tl;
46 #endif
47
48 /*******************************************************************************
49 * Address of the entrypoint vector table in OPTEE. It is
50 * initialised once on the primary core after a cold boot.
51 ******************************************************************************/
52 struct optee_vectors *optee_vector_table;
53
54 /*******************************************************************************
55 * Array to keep track of per-cpu OPTEE state
56 ******************************************************************************/
57 optee_context_t opteed_sp_context[OPTEED_CORE_COUNT];
58 uint32_t opteed_rw;
59
60 #if OPTEE_ALLOW_SMC_LOAD
61 static bool opteed_allow_load;
62 /* OP-TEE image loading service UUID */
63 DEFINE_SVC_UUID2(optee_image_load_uuid,
64 0xb1eafba3, 0x5d31, 0x4612, 0xb9, 0x06,
65 0xc4, 0xc7, 0xa4, 0xbe, 0x3c, 0xc0);
66
dual32to64(uint32_t high,uint32_t low)67 static uint64_t dual32to64(uint32_t high, uint32_t low)
68 {
69 return ((uint64_t)high << 32) | low;
70 }
71
72 #define OPTEED_FDT_SIZE 2048
73 static uint8_t fdt_buf[OPTEED_FDT_SIZE] __aligned(CACHE_WRITEBACK_GRANULE);
74
75 #else
76 static int32_t opteed_init(void);
77 #endif
78 /*******************************************************************************
79 * This function is the handler registered for S-EL1 interrupts by the
80 * OPTEED. It validates the interrupt and upon success arranges entry into
81 * the OPTEE at 'optee_fiq_entry()' for handling the interrupt.
82 ******************************************************************************/
opteed_sel1_interrupt_handler(uint32_t id,uint32_t flags,void * handle,void * cookie)83 static uint64_t opteed_sel1_interrupt_handler(uint32_t id,
84 uint32_t flags,
85 void *handle,
86 void *cookie)
87 {
88 uint32_t linear_id;
89 optee_context_t *optee_ctx;
90
91 #if OPTEE_ALLOW_SMC_LOAD
92 if (optee_vector_table == NULL) {
93 /* OPTEE is not loaded yet, ignore this interrupt */
94 SMC_RET0(handle);
95 }
96 #endif
97
98 /* Check the security state when the exception was generated */
99 assert(get_interrupt_src_ss(flags) == NON_SECURE);
100
101 /* Sanity check the pointer to this cpu's context */
102 assert(handle == cm_get_context(NON_SECURE));
103
104 /* Save the non-secure context before entering the OPTEE */
105 cm_el1_sysregs_context_save(NON_SECURE);
106
107 /* Get a reference to this cpu's OPTEE context */
108 linear_id = plat_my_core_pos();
109 optee_ctx = &opteed_sp_context[linear_id];
110 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
111
112 cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry);
113 cm_el1_sysregs_context_restore(SECURE);
114 cm_set_next_eret_context(SECURE);
115
116 /*
117 * Tell the OPTEE that it has to handle an FIQ (synchronously).
118 * Also the instruction in normal world where the interrupt was
119 * generated is passed for debugging purposes. It is safe to
120 * retrieve this address from ELR_EL3 as the secure context will
121 * not take effect until el3_exit().
122 */
123 SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3());
124 }
125
126 /*
127 * Registers an interrupt handler for S-EL1 interrupts when generated during
128 * code executing in the non-secure state. Panics if it fails to do so.
129 */
register_opteed_interrupt_handler(void)130 static void register_opteed_interrupt_handler(void)
131 {
132 u_register_t flags;
133 uint64_t rc;
134
135 flags = 0;
136 set_interrupt_rm_flag(flags, NON_SECURE);
137 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
138 opteed_sel1_interrupt_handler,
139 flags);
140 if (rc)
141 panic();
142 }
143
144 /*******************************************************************************
145 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type
146 * (aarch32/aarch64) if not already known and initialises the context for entry
147 * into OPTEE for its initialization.
148 ******************************************************************************/
opteed_setup(void)149 static int32_t opteed_setup(void)
150 {
151 #if OPTEE_ALLOW_SMC_LOAD
152 opteed_allow_load = true;
153 INFO("Delaying OP-TEE setup until we receive an SMC call to load it\n");
154 /*
155 * We must register the interrupt handler now so that the interrupt
156 * priorities are not changed after starting the linux kernel.
157 */
158 register_opteed_interrupt_handler();
159 return 0;
160 #else
161 entry_point_info_t *optee_ep_info;
162 uint32_t linear_id;
163 uint64_t arg0;
164 uint64_t arg1;
165 uint64_t arg2;
166 uint64_t arg3;
167 struct transfer_list_header __maybe_unused *tl = NULL;
168 struct transfer_list_entry __maybe_unused *te = NULL;
169 void __maybe_unused *dt = NULL;
170
171 linear_id = plat_my_core_pos();
172
173 /*
174 * Get information about the Secure Payload (BL32) image. Its
175 * absence is a critical failure. TODO: Add support to
176 * conditionally include the SPD service
177 */
178 optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
179 if (optee_ep_info == NULL) {
180 WARN("No OPTEE provided by BL2 boot loader, Booting device"
181 " without OPTEE initialization. SMC`s destined for OPTEE"
182 " will return SMC_UNK\n");
183 return 1;
184 }
185
186 /*
187 * If there's no valid entry point for SP, we return a non-zero value
188 * signalling failure initializing the service. We bail out without
189 * registering any handlers
190 */
191 if (optee_ep_info->pc == 0U) {
192 return 1;
193 }
194
195 #if TRANSFER_LIST
196 tl = (void *)optee_ep_info->args.arg3;
197
198 if (transfer_list_check_header(tl)) {
199 te = transfer_list_find(tl, TL_TAG_FDT);
200 dt = transfer_list_entry_data(te);
201
202 opteed_rw = GET_RW(optee_ep_info->spsr);
203 if (opteed_rw == OPTEE_AARCH64) {
204 if (optee_ep_info->args.arg1 !=
205 TRANSFER_LIST_HANDOFF_X1_VALUE(
206 REGISTER_CONVENTION_VERSION))
207 return 1;
208
209 arg0 = (uint64_t)dt;
210 arg2 = 0;
211 } else {
212 if (optee_ep_info->args.arg1 !=
213 TRANSFER_LIST_HANDOFF_R1_VALUE(
214 REGISTER_CONVENTION_VERSION))
215 return 1;
216
217 arg0 = 0;
218 arg2 = (uint64_t)dt;
219 }
220
221 arg1 = optee_ep_info->args.arg1;
222 arg3 = optee_ep_info->args.arg3;
223
224 } else
225 #endif /* TRANSFER_LIST */
226 {
227 /* Default handoff arguments */
228 opteed_rw = optee_ep_info->args.arg0;
229 arg0 = optee_ep_info->args.arg1; /* opteed_pageable_part */
230 arg1 = optee_ep_info->args.arg2; /* opteed_mem_limit */
231 arg2 = optee_ep_info->args.arg3; /* dt_addr */
232 arg3 = 0;
233 }
234
235 opteed_init_optee_ep_state(optee_ep_info, opteed_rw,
236 optee_ep_info->pc, arg0, arg1, arg2,
237 arg3, &opteed_sp_context[linear_id]);
238
239 /*
240 * All OPTEED initialization done. Now register our init function with
241 * BL31 for deferred invocation
242 */
243 bl31_register_bl32_init(&opteed_init);
244
245 return 0;
246 #endif /* OPTEE_ALLOW_SMC_LOAD */
247 }
248
249 /*******************************************************************************
250 * This function passes control to the OPTEE image (BL32) for the first time
251 * on the primary cpu after a cold boot. It assumes that a valid secure
252 * context has already been created by opteed_setup() which can be directly
253 * used. It also assumes that a valid non-secure context has been
254 * initialised by PSCI so it does not need to save and restore any
255 * non-secure state. This function performs a synchronous entry into
256 * OPTEE. OPTEE passes control back to this routine through a SMC. This returns
257 * a non-zero value on success and zero on failure.
258 ******************************************************************************/
259 static int32_t
opteed_init_with_entry_point(entry_point_info_t * optee_entry_point)260 opteed_init_with_entry_point(entry_point_info_t *optee_entry_point)
261 {
262 uint32_t linear_id = plat_my_core_pos();
263 optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
264 uint64_t rc;
265 assert(optee_entry_point);
266
267 cm_init_my_context(optee_entry_point);
268
269 /*
270 * Arrange for an entry into OPTEE. It will be returned via
271 * OPTEE_ENTRY_DONE case
272 */
273 rc = opteed_synchronous_sp_entry(optee_ctx);
274 assert(rc != 0);
275
276 return rc;
277 }
278
279 #if !OPTEE_ALLOW_SMC_LOAD
opteed_init(void)280 static int32_t opteed_init(void)
281 {
282 entry_point_info_t *optee_entry_point;
283 /*
284 * Get information about the OP-TEE (BL32) image. Its
285 * absence is a critical failure.
286 */
287 optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE);
288 return opteed_init_with_entry_point(optee_entry_point);
289 }
290 #endif /* !OPTEE_ALLOW_SMC_LOAD */
291
292 #if OPTEE_ALLOW_SMC_LOAD
293 #if COREBOOT
294 /*
295 * Adds a firmware/coreboot node with the coreboot table information to a device
296 * tree. Returns zero on success or if there is no coreboot table information;
297 * failure code otherwise.
298 */
add_coreboot_node(void * fdt)299 static int add_coreboot_node(void *fdt)
300 {
301 int ret;
302 uint64_t coreboot_table_addr;
303 uint32_t coreboot_table_size;
304 struct {
305 uint64_t addr;
306 uint32_t size;
307 } reg_node;
308 coreboot_get_table_location(&coreboot_table_addr, &coreboot_table_size);
309 if (!coreboot_table_addr || !coreboot_table_size) {
310 WARN("Unable to get coreboot table location for device tree");
311 return 0;
312 }
313 ret = fdt_begin_node(fdt, "firmware");
314 if (ret)
315 return ret;
316
317 ret = fdt_property(fdt, "ranges", NULL, 0);
318 if (ret)
319 return ret;
320
321 ret = fdt_begin_node(fdt, "coreboot");
322 if (ret)
323 return ret;
324
325 ret = fdt_property_string(fdt, "compatible", "coreboot");
326 if (ret)
327 return ret;
328
329 reg_node.addr = cpu_to_fdt64(coreboot_table_addr);
330 reg_node.size = cpu_to_fdt32(coreboot_table_size);
331 ret = fdt_property(fdt, "reg", ®_node,
332 sizeof(uint64_t) + sizeof(uint32_t));
333 if (ret)
334 return ret;
335
336 ret = fdt_end_node(fdt);
337 if (ret)
338 return ret;
339
340 return fdt_end_node(fdt);
341 }
342 #endif /* COREBOOT */
343
344 #if CROS_WIDEVINE_SMC
345 /*
346 * Adds a options/widevine node with the widevine table information to a device
347 * tree. Returns zero on success or if there is no widevine table information;
348 * failure code otherwise.
349 */
add_options_widevine_node(void * fdt)350 static int add_options_widevine_node(void *fdt)
351 {
352 int ret;
353
354 ret = fdt_begin_node(fdt, "options");
355 if (ret)
356 return ret;
357
358 ret = fdt_begin_node(fdt, "op-tee");
359 if (ret)
360 return ret;
361
362 ret = fdt_begin_node(fdt, "widevine");
363 if (ret)
364 return ret;
365
366 if (cros_oem_tpm_auth_pk.length) {
367 ret = fdt_property(fdt, "tcg,tpm-auth-public-key",
368 cros_oem_tpm_auth_pk.buffer,
369 cros_oem_tpm_auth_pk.length);
370 if (ret)
371 return ret;
372 }
373
374 if (cros_oem_huk.length) {
375 ret = fdt_property(fdt, "op-tee,hardware-unique-key",
376 cros_oem_huk.buffer, cros_oem_huk.length);
377 if (ret)
378 return ret;
379 }
380
381 if (cros_oem_rot.length) {
382 ret = fdt_property(fdt, "google,widevine-root-of-trust-ecc-p256",
383 cros_oem_rot.buffer, cros_oem_rot.length);
384 if (ret)
385 return ret;
386 }
387
388 if (cros_oem_gck.length) {
389 ret = fdt_property(fdt, "google,gsc-counter-key",
390 cros_oem_gck.buffer, cros_oem_gck.length);
391 if (ret)
392 return ret;
393 }
394
395 if (cros_oem_ddk.length) {
396 ret = fdt_property(fdt, "google,drm-device-key",
397 cros_oem_ddk.buffer, cros_oem_ddk.length);
398 if (ret)
399 return ret;
400 }
401
402 if (cros_oem_stable_huk.length) {
403 ret = fdt_property(fdt, "op-tee,stable-hardware-unique-key",
404 cros_oem_stable_huk.buffer,
405 cros_oem_stable_huk.length);
406 if (ret)
407 return ret;
408 }
409
410 ret = fdt_end_node(fdt);
411 if (ret)
412 return ret;
413
414 ret = fdt_end_node(fdt);
415 if (ret)
416 return ret;
417
418 return fdt_end_node(fdt);
419 }
420 #endif /* CROS_WIDEVINE_SMC */
421
422 /*
423 * Creates a device tree for passing into OP-TEE. Currently is populated with
424 * the coreboot table address.
425 * Returns 0 on success, error code otherwise.
426 */
create_opteed_dt(void)427 static int create_opteed_dt(void)
428 {
429 int ret;
430
431 ret = fdt_create(fdt_buf, OPTEED_FDT_SIZE);
432 if (ret)
433 return ret;
434
435 ret = fdt_finish_reservemap(fdt_buf);
436 if (ret)
437 return ret;
438
439 ret = fdt_begin_node(fdt_buf, "");
440 if (ret)
441 return ret;
442
443 #if COREBOOT
444 ret = add_coreboot_node(fdt_buf);
445 if (ret)
446 return ret;
447 #endif /* COREBOOT */
448
449 #if CROS_WIDEVINE_SMC
450 ret = add_options_widevine_node(fdt_buf);
451 if (ret)
452 return ret;
453 #endif /* CROS_WIDEVINE_SMC */
454
455 ret = fdt_end_node(fdt_buf);
456 if (ret)
457 return ret;
458
459 return fdt_finish(fdt_buf);
460 }
461
462 #if TRANSFER_LIST
create_smc_tl(const void * fdt,uint32_t fdt_sz)463 static int32_t create_smc_tl(const void *fdt, uint32_t fdt_sz)
464 {
465 bl31_tl = transfer_list_init((void *)(uintptr_t)FW_HANDOFF_BASE,
466 FW_HANDOFF_SIZE);
467 if (!bl31_tl) {
468 ERROR("Failed to initialize Transfer List at 0x%lx\n",
469 (unsigned long)FW_HANDOFF_BASE);
470 return -1;
471 }
472
473 if (!transfer_list_add(bl31_tl, TL_TAG_FDT, fdt_sz, fdt)) {
474 return -1;
475 }
476 return 0;
477 }
478 #endif
479
480 /*******************************************************************************
481 * This function is responsible for handling the SMC that loads the OP-TEE
482 * binary image via a non-secure SMC call. It takes the size and physical
483 * address of the payload as parameters.
484 ******************************************************************************/
opteed_handle_smc_load(uint64_t data_size,uint64_t data_pa)485 static int32_t opteed_handle_smc_load(uint64_t data_size, uint64_t data_pa)
486 {
487 uintptr_t data_va = data_pa;
488 uint64_t mapped_data_pa;
489 uintptr_t mapped_data_va;
490 uint64_t data_map_size;
491 int32_t rc;
492 optee_header_t *image_header;
493 uint8_t *image_ptr;
494 uint64_t target_pa;
495 uint64_t target_end_pa;
496 uint64_t image_pa;
497 uintptr_t image_va;
498 optee_image_t *curr_image;
499 uintptr_t target_va;
500 uint64_t target_size;
501 entry_point_info_t optee_ep_info;
502 uint32_t linear_id = plat_my_core_pos();
503 uint64_t dt_addr = 0;
504 uint64_t arg0 = 0;
505 uint64_t arg1 = 0;
506 uint64_t arg2 = 0;
507 uint64_t arg3 = 0;
508
509 mapped_data_pa = page_align(data_pa, DOWN);
510 mapped_data_va = mapped_data_pa;
511 data_map_size = page_align(data_size + (mapped_data_pa - data_pa), UP);
512
513 /*
514 * We do not validate the passed in address because we are trusting the
515 * non-secure world at this point still.
516 */
517 rc = mmap_add_dynamic_region(mapped_data_pa, mapped_data_va,
518 data_map_size, MT_MEMORY | MT_RO | MT_NS);
519 if (rc != 0) {
520 return rc;
521 }
522
523 image_header = (optee_header_t *)data_va;
524 if (image_header->magic != TEE_MAGIC_NUM_OPTEE ||
525 image_header->version != 2 || image_header->nb_images != 1) {
526 mmap_remove_dynamic_region(mapped_data_va, data_map_size);
527 return -EINVAL;
528 }
529
530 image_ptr = (uint8_t *)data_va + sizeof(optee_header_t) +
531 sizeof(optee_image_t);
532 if (image_header->arch == 1) {
533 opteed_rw = OPTEE_AARCH64;
534 } else {
535 opteed_rw = OPTEE_AARCH32;
536 }
537
538 curr_image = &image_header->optee_image_list[0];
539 image_pa = dual32to64(curr_image->load_addr_hi,
540 curr_image->load_addr_lo);
541 image_va = image_pa;
542 target_end_pa = image_pa + curr_image->size;
543
544 /* Now also map the memory we want to copy it to. */
545 target_pa = page_align(image_pa, DOWN);
546 target_va = target_pa;
547 target_size = page_align(target_end_pa, UP) - target_pa;
548
549 rc = mmap_add_dynamic_region(target_pa, target_va, target_size,
550 MT_MEMORY | MT_RW | MT_SECURE);
551 if (rc != 0) {
552 mmap_remove_dynamic_region(mapped_data_va, data_map_size);
553 return rc;
554 }
555
556 INFO("Loaded OP-TEE via SMC: size %d addr 0x%" PRIx64 "\n",
557 curr_image->size, image_va);
558
559 memcpy((void *)image_va, image_ptr, curr_image->size);
560 flush_dcache_range(target_pa, target_size);
561
562 mmap_remove_dynamic_region(mapped_data_va, data_map_size);
563 mmap_remove_dynamic_region(target_va, target_size);
564
565 /* Save the non-secure state */
566 cm_el1_sysregs_context_save(NON_SECURE);
567
568 rc = create_opteed_dt();
569 if (rc) {
570 ERROR("Failed device tree creation %d\n", rc);
571 return rc;
572 }
573 dt_addr = (uint64_t)fdt_buf;
574 flush_dcache_range(dt_addr, OPTEED_FDT_SIZE);
575
576 #if TRANSFER_LIST
577 if (!create_smc_tl((void *)dt_addr, OPTEED_FDT_SIZE)) {
578 struct transfer_list_entry *te = NULL;
579 void *dt = NULL;
580
581 te = transfer_list_find(bl31_tl, TL_TAG_FDT);
582 dt = transfer_list_entry_data(te);
583
584 if (opteed_rw == OPTEE_AARCH64) {
585 arg0 = (uint64_t)dt;
586 arg1 = TRANSFER_LIST_HANDOFF_X1_VALUE(REGISTER_CONVENTION_VERSION);
587 arg2 = 0;
588 } else {
589 arg0 = 0;
590 arg1 = TRANSFER_LIST_HANDOFF_R1_VALUE(REGISTER_CONVENTION_VERSION);
591 arg2 = (uint64_t)dt;
592 }
593
594 arg3 = (uint64_t)bl31_tl;
595 } else
596 #endif /* TRANSFER_LIST */
597 {
598 /* Default handoff arguments */
599 arg2 = dt_addr;
600 }
601
602 opteed_init_optee_ep_state(&optee_ep_info,
603 opteed_rw,
604 image_pa,
605 arg0,
606 arg1,
607 arg2,
608 arg3,
609 &opteed_sp_context[linear_id]);
610 if (opteed_init_with_entry_point(&optee_ep_info) == 0) {
611 rc = -EFAULT;
612 }
613
614 /* Restore non-secure state */
615 cm_el1_sysregs_context_restore(NON_SECURE);
616 cm_set_next_eret_context(NON_SECURE);
617
618 return rc;
619 }
620 #endif /* OPTEE_ALLOW_SMC_LOAD */
621
622 /*******************************************************************************
623 * This function is responsible for handling all SMCs in the Trusted OS/App
624 * range from the non-secure state as defined in the SMC Calling Convention
625 * Document. It is also responsible for communicating with the Secure
626 * payload to delegate work and return results back to the non-secure
627 * state. Lastly it will also return any information that OPTEE needs to do
628 * the work assigned to it.
629 ******************************************************************************/
opteed_smc_handler(uint32_t smc_fid,u_register_t x1,u_register_t x2,u_register_t x3,u_register_t x4,void * cookie,void * handle,u_register_t flags)630 static uintptr_t opteed_smc_handler(uint32_t smc_fid,
631 u_register_t x1,
632 u_register_t x2,
633 u_register_t x3,
634 u_register_t x4,
635 void *cookie,
636 void *handle,
637 u_register_t flags)
638 {
639 cpu_context_t *ns_cpu_context;
640 uint32_t linear_id = plat_my_core_pos();
641 optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
642
643 /*
644 * Determine which security state this SMC originated from
645 */
646
647 if (is_caller_non_secure(flags)) {
648 #if OPTEE_ALLOW_SMC_LOAD
649 if (opteed_allow_load && smc_fid == NSSMC_OPTEED_CALL_UID) {
650 /* Provide the UUID of the image loading service. */
651 SMC_UUID_RET(handle, optee_image_load_uuid);
652 }
653 if (smc_fid == NSSMC_OPTEED_CALL_LOAD_IMAGE) {
654 /*
655 * TODO: Consider wiping the code for SMC loading from
656 * memory after it has been invoked similar to what is
657 * done under RECLAIM_INIT, but extended to happen
658 * later.
659 */
660 if (!opteed_allow_load) {
661 SMC_RET1(handle, -EPERM);
662 }
663
664 opteed_allow_load = false;
665 uint64_t data_size = dual32to64(x1, x2);
666 uint64_t data_pa = dual32to64(x3, x4);
667 if (!data_size || !data_pa) {
668 /*
669 * This is invoked when the OP-TEE image didn't
670 * load correctly in the kernel but we want to
671 * block off loading of it later for security
672 * reasons.
673 */
674 SMC_RET1(handle, -EINVAL);
675 }
676 SMC_RET1(handle, opteed_handle_smc_load(
677 data_size, data_pa));
678 }
679 #endif /* OPTEE_ALLOW_SMC_LOAD */
680 /*
681 * This is a fresh request from the non-secure client.
682 * The parameters are in x1 and x2. Figure out which
683 * registers need to be preserved, save the non-secure
684 * state and send the request to the secure payload.
685 */
686 assert(handle == cm_get_context(NON_SECURE));
687
688 cm_el1_sysregs_context_save(NON_SECURE);
689
690 /*
691 * We are done stashing the non-secure context. Ask the
692 * OP-TEE to do the work now. If we are loading vi an SMC,
693 * then we also need to init this CPU context if not done
694 * already.
695 */
696 if (optee_vector_table == NULL) {
697 SMC_RET1(handle, -EINVAL);
698 }
699
700 if (get_optee_pstate(optee_ctx->state) ==
701 OPTEE_PSTATE_UNKNOWN) {
702 opteed_cpu_on_finish_handler(0);
703 }
704
705 /*
706 * Verify if there is a valid context to use, copy the
707 * operation type and parameters to the secure context
708 * and jump to the fast smc entry point in the secure
709 * payload. Entry into S-EL1 will take place upon exit
710 * from this function.
711 */
712 assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
713
714 /* Set appropriate entry for SMC.
715 * We expect OPTEE to manage the PSTATE.I and PSTATE.F
716 * flags as appropriate.
717 */
718 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
719 cm_set_elr_el3(SECURE, (uint64_t)
720 &optee_vector_table->fast_smc_entry);
721 } else {
722 cm_set_elr_el3(SECURE, (uint64_t)
723 &optee_vector_table->yield_smc_entry);
724 }
725
726 cm_el1_sysregs_context_restore(SECURE);
727 cm_set_next_eret_context(SECURE);
728
729 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
730 CTX_GPREG_X4,
731 read_ctx_reg(get_gpregs_ctx(handle),
732 CTX_GPREG_X4));
733 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
734 CTX_GPREG_X5,
735 read_ctx_reg(get_gpregs_ctx(handle),
736 CTX_GPREG_X5));
737 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
738 CTX_GPREG_X6,
739 read_ctx_reg(get_gpregs_ctx(handle),
740 CTX_GPREG_X6));
741 /* Propagate hypervisor client ID */
742 write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
743 CTX_GPREG_X7,
744 read_ctx_reg(get_gpregs_ctx(handle),
745 CTX_GPREG_X7));
746
747 SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3);
748 }
749
750 /*
751 * Returning from OPTEE
752 */
753
754 switch (smc_fid) {
755 /*
756 * OPTEE has finished initialising itself after a cold boot
757 */
758 case TEESMC_OPTEED_RETURN_ENTRY_DONE:
759 /*
760 * Stash the OPTEE entry points information. This is done
761 * only once on the primary cpu
762 */
763 assert(optee_vector_table == NULL);
764 optee_vector_table = (optee_vectors_t *) x1;
765
766 if (optee_vector_table != NULL) {
767 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON);
768
769 /*
770 * OPTEE has been successfully initialized.
771 * Register power management hooks with PSCI
772 */
773 psci_register_spd_pm_hook(&opteed_pm);
774
775 #if !OPTEE_ALLOW_SMC_LOAD
776 register_opteed_interrupt_handler();
777 #endif
778 }
779
780 /*
781 * OPTEE reports completion. The OPTEED must have initiated
782 * the original request through a synchronous entry into
783 * OPTEE. Jump back to the original C runtime context.
784 */
785 opteed_synchronous_sp_exit(optee_ctx, x1);
786 break;
787
788
789 /*
790 * These function IDs is used only by OP-TEE to indicate it has
791 * finished:
792 * 1. turning itself on in response to an earlier psci
793 * cpu_on request
794 * 2. resuming itself after an earlier psci cpu_suspend
795 * request.
796 */
797 case TEESMC_OPTEED_RETURN_ON_DONE:
798 case TEESMC_OPTEED_RETURN_RESUME_DONE:
799
800
801 /*
802 * These function IDs is used only by the SP to indicate it has
803 * finished:
804 * 1. suspending itself after an earlier psci cpu_suspend
805 * request.
806 * 2. turning itself off in response to an earlier psci
807 * cpu_off request.
808 */
809 case TEESMC_OPTEED_RETURN_OFF_DONE:
810 case TEESMC_OPTEED_RETURN_SUSPEND_DONE:
811 case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE:
812 case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE:
813
814 /*
815 * OPTEE reports completion. The OPTEED must have initiated the
816 * original request through a synchronous entry into OPTEE.
817 * Jump back to the original C runtime context, and pass x1 as
818 * return value to the caller
819 */
820 opteed_synchronous_sp_exit(optee_ctx, x1);
821 break;
822
823 /*
824 * OPTEE is returning from a call or being preempted from a call, in
825 * either case execution should resume in the normal world.
826 */
827 case TEESMC_OPTEED_RETURN_CALL_DONE:
828 /*
829 * This is the result from the secure client of an
830 * earlier request. The results are in x0-x3. Copy it
831 * into the non-secure context, save the secure state
832 * and return to the non-secure state.
833 */
834 assert(handle == cm_get_context(SECURE));
835 cm_el1_sysregs_context_save(SECURE);
836
837 /* Get a reference to the non-secure context */
838 ns_cpu_context = cm_get_context(NON_SECURE);
839 assert(ns_cpu_context);
840
841 /* Restore non-secure state */
842 cm_el1_sysregs_context_restore(NON_SECURE);
843 cm_set_next_eret_context(NON_SECURE);
844
845 SMC_RET4(ns_cpu_context, x1, x2, x3, x4);
846
847 /*
848 * OPTEE has finished handling a S-EL1 FIQ interrupt. Execution
849 * should resume in the normal world.
850 */
851 case TEESMC_OPTEED_RETURN_FIQ_DONE:
852 /* Get a reference to the non-secure context */
853 ns_cpu_context = cm_get_context(NON_SECURE);
854 assert(ns_cpu_context);
855
856 /*
857 * Restore non-secure state. There is no need to save the
858 * secure system register context since OPTEE was supposed
859 * to preserve it during S-EL1 interrupt handling.
860 */
861 cm_el1_sysregs_context_restore(NON_SECURE);
862 cm_set_next_eret_context(NON_SECURE);
863
864 SMC_RET0((uint64_t) ns_cpu_context);
865
866 default:
867 panic();
868 }
869 }
870
871 /* Define an OPTEED runtime service descriptor for fast SMC calls */
872 DECLARE_RT_SVC(
873 opteed_fast,
874
875 OEN_TOS_START,
876 OEN_TOS_END,
877 SMC_TYPE_FAST,
878 opteed_setup,
879 opteed_smc_handler
880 );
881
882 /* Define an OPTEED runtime service descriptor for yielding SMC calls */
883 DECLARE_RT_SVC(
884 opteed_std,
885
886 OEN_TOS_START,
887 OEN_TOS_END,
888 SMC_TYPE_YIELD,
889 NULL,
890 opteed_smc_handler
891 );
892