| /rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_training.c | 207 int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable) in ddr3_tip_configure_cs()
263 static int calc_cs_num(u32 dev_num, u32 if_id, u32 *cs_num) in calc_cs_num()
302 u32 if_id; in hws_ddr3_tip_init_controller() local
675 u32 if_id; in hws_ddr3_tip_load_topology_map() local
723 static int ddr3_tip_rank_control(u32 dev_num, u32 if_id) in ddr3_tip_rank_control()
758 static int ddr3_tip_pad_inv(u32 dev_num, u32 if_id) in ddr3_tip_pad_inv()
901 u32 if_id, u32 reg_addr, u32 data_value, u32 mask) in ddr3_tip_if_write()
917 u32 if_id, u32 reg_addr, u32 *data, u32 mask) in ddr3_tip_if_read()
933 u32 if_id, u32 exp_value, u32 mask, u32 offset, in ddr3_tip_if_polling()
984 int ddr3_tip_bus_read(u32 dev_num, u32 if_id, in ddr3_tip_bus_read()
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| H A D | ddr3_training_leveling.c | 66 u32 bus_num, if_id, cl_val; in ddr3_tip_dynamic_read_leveling() local
443 u32 c_cs, if_id, cs_mask = 0; in ddr3_tip_legacy_dynamic_write_leveling() local
484 u32 c_cs, if_id, cs_mask = 0; in ddr3_tip_legacy_dynamic_read_leveling() local
526 u32 bus_num, if_id, cl_val, bit_num; in ddr3_tip_dynamic_per_bit_read_leveling() local
917 int ddr3_tip_calc_cs_mask(u32 dev_num, u32 if_id, u32 effective_cs, in ddr3_tip_calc_cs_mask()
959 u32 reg_data = 0, iter, if_id, bus_cnt; in ddr3_tip_dynamic_write_leveling() local
1308 u32 if_id, bus_id, data, data_tmp; in ddr3_tip_dynamic_write_leveling_supp() local
1425 static int ddr3_tip_wl_supp_align_phase_shift(u32 dev_num, u32 if_id, in ddr3_tip_wl_supp_align_phase_shift()
1465 static int ddr3_tip_xsb_compare_test(u32 dev_num, u32 if_id, u32 bus_id, in ddr3_tip_xsb_compare_test()
1560 static int ddr3_tip_wl_supp_one_clk_err_shift(u32 dev_num, u32 if_id, in ddr3_tip_wl_supp_one_clk_err_shift()
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| H A D | ddr3_a38x.c | 257 u32 if_id, int enable) in ddr3_tip_a38x_pipe_enable()
286 u32 if_id, u32 reg_addr, u32 data_value, in ddr3_tip_a38x_if_write()
311 u32 if_id, u32 reg_addr, u32 *data, u32 mask) in ddr3_tip_a38x_if_read()
450 u32 if_id = 0; in ddr3_a38x_update_topology_map() local
588 static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id, in ddr3_tip_a38x_set_divider()
683 int ddr3_tip_ext_read(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_read()
697 int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_write()
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| H A D | ddr3_debug.c | 100 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local
327 u32 if_id = 0; in ddr3_tip_print_log() local
488 u8 if_id = 0, csindex = 0, bus_id = 0, idx = 0; in ddr3_tip_print_stability_log() local
660 u32 if_id = 0, bus_id = 0; in read_adll_value() local
693 u32 if_id = 0, bus_id = 0; in write_adll_value() local
764 u32 bus_cnt = 0, if_id, data_p1, data_p2, ui_data3, dev_num = 0; in ddr3_tip_print_adll() local
818 u32 tmp_val = 0, if_id = 0, pup_id = 0; in ddr3_tip_access_atr() local
1183 static u32 ddr3_tip_compare(u32 if_id, u32 *p_src, u32 *p_dst, in ddr3_tip_compare()
1222 u32 bus_cnt = 0, adll_val = 0, if_id, ui_prev_adll, ui_mask_bit, in ddr3_tip_sweep_test() local
1288 int if_id = 0; in ddr3_tip_run_sweep_test() local
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| H A D | ddr3_training_static.c | 97 u32 if_id; in ddr3_tip_static_round_trip_arr_build() local
149 int ddr3_tip_write_leveling_static_config(u32 dev_num, u32 if_id, in ddr3_tip_write_leveling_static_config()
207 u32 if_id, in ddr3_tip_read_leveling_static_config()
345 u32 if_id = 0; in ddr3_tip_run_static_alg() local
472 u32 if_id, phy_id; in ddr3_tip_configure_phy() local
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| H A D | ddr3_training_hw_algo.c | 50 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id) in ddr3_tip_write_additional_odt_setting()
119 int get_valid_win_rx(u32 dev_num, u32 if_id, u8 res[4]) in get_valid_win_rx()
168 u32 pup = 0, if_id = 0, num_pup = 0, rep = 0; in ddr3_tip_vref() local
636 u32 if_id = 0; in ddr3_tip_cmd_addr_init_delay() local
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| H A D | ddr3_training_ip_engine.c | 479 u32 if_id, enum hws_pattern pattern, in ddr3_tip_load_pattern_to_odpg()
518 u32 if_id, enum hws_dir direction, u32 tx_phases, in ddr3_tip_configure_odpg()
584 int ddr3_tip_read_training_result(u32 dev_num, u32 if_id, in ddr3_tip_read_training_result()
740 u32 pattern = 0, if_id; in ddr3_tip_load_all_pattern_to_mem() local
765 int is_odpg_access_done(u32 dev_num, u32 if_id) in is_odpg_access_done()
800 u32 reg_data, if_id; in ddr3_tip_load_pattern_to_mem() local
889 u32 if_id, in ddr3_tip_ip_training_wrapper_int()
991 u32 if_id, in ddr3_tip_ip_training_wrapper()
1178 u32 bus_cnt = 0, if_id, dev_num = 0; in ddr3_tip_load_phy_values() local
1257 u32 pattern, if_id, pup_id; in ddr3_tip_training_ip_test() local
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| H A D | ddr3_training_pbs.c | 52 u32 pup = 0, bit = 0, if_id = 0, all_lock = 0, cs_num = 0; in ddr3_tip_pbs() local
938 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local
976 u32 if_id, pup, bit; in ddr3_tip_clean_pbs_result() local
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| H A D | ddr3_training_centralization.c | 61 u32 if_id, pattern_id, bit_id; in ddr3_tip_centralization() local
500 u32 if_id, pup_id, pattern_id, bit_id; in ddr3_tip_special_rx() local
697 u32 if_id = 0, bus_id = 0; in ddr3_tip_print_centralization_result() local
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| H A D | ddr3_training_bist.c | 140 int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id, in ddr3_tip_bist_read_result()
235 u32 if_id, enum hws_bist_operation oper_type) in ddr3_tip_bist_operation()
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| H A D | ddr3_training_ip_flow.h | 31 #define IS_ACTIVE(if_mask , if_id) \ argument
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| /rk3399_rockchip-uboot/include/fsl-mc/ |
| H A D | fsl_dprc.h | 883 uint16_t if_id; member
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