1 /*
2 * SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2008-2015 Fuzhou Rockchip Electronics Co., Ltd
4 */
5 #include <common.h>
6 #include <malloc.h>
7 #include <fdtdec.h>
8 #include <fdt_support.h>
9 #include <asm/io.h>
10 #include <linux/media-bus-format.h>
11 #include <asm/arch-rockchip/clock.h>
12 #include <dm/device.h>
13 #include <dm/read.h>
14 #include <dm/uclass-internal.h>
15 #include <linux/fb.h>
16 #include <edid.h>
17 #include <syscon.h>
18 #include <boot_rkimg.h>
19 #include <mapmem.h>
20 #include <misc.h>
21
22 #include "rockchip_display.h"
23 #include "rockchip_crtc.h"
24 #include "rockchip_connector.h"
25 #include "rockchip_phy.h"
26 #include "rockchip_tve.h"
27
28 #define RK322X_VDAC_STANDARD 0x15
29
30 static const struct drm_display_mode tve_modes[] = {
31 /* 0 - 720x576i@50Hz */
32 { DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
33 816, 864, 576, 580, 586, 625, 0,
34 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
35 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
36 .vrefresh = 50, },
37 /* 1 - 720x480i@60Hz */
38 { DRM_MODE(DRM_MODE_TYPE_DRIVER, 13500, 720, 753,
39 815, 858, 480, 483, 486, 525, 0,
40 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
41 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
42 .vrefresh = 60, },
43 };
44
45 struct env_config {
46 u32 offset;
47 u32 value;
48 };
49
50 static struct env_config ntsc_bt656_config[] = {
51 { BT656_DECODER_CROP, 0x00000000 },
52 { BT656_DECODER_SIZE, 0x01e002d0 },
53 { BT656_DECODER_HTOTAL_HS_END, 0x035a003e },
54 { BT656_DECODER_VACT_ST_HACT_ST, 0x00160069 },
55 { BT656_DECODER_VTOTAL_VS_END, 0x020d0003 },
56 { BT656_DECODER_VS_ST_END_F1, 0x01060109 },
57 { BT656_DECODER_DBG_REG, 0x024002d0 },
58 { BT656_DECODER_CTRL, 0x00000009 },
59 };
60
61 static struct env_config ntsc_tve_config[] = {
62 { TVE_MODE_CTRL, 0x000af906 },
63 { TVE_HOR_TIMING1, 0x00c07a81 },
64 { TVE_HOR_TIMING2, 0x169810fc },
65 { TVE_HOR_TIMING3, 0x96b40000 },
66 { TVE_SUB_CAR_FRQ, 0x21f07bd7 },
67 { TVE_IMAGE_POSITION, 0x001500d6 },
68 { TVE_ROUTING, 0x10088880 },
69 { TVE_SYNC_ADJUST, 0x00000000 },
70 { TVE_STATUS, 0x00000000 },
71 { TVE_CTRL, 0x00000000 },
72 { TVE_INTR_STATUS, 0x00000000 },
73 { TVE_INTR_EN, 0x00000000 },
74 { TVE_INTR_CLR, 0x00000000 },
75 { TVE_COLOR_BUSRT_SAT, 0x0052543c },
76 { TVE_CHROMA_BANDWIDTH, 0x00000002 },
77 { TVE_BRIGHTNESS_CONTRAST, 0x00008300 },
78 { TVE_CLAMP, 0x00000000 },
79 };
80
81 static struct env_config pal_bt656_config[] = {
82 { BT656_DECODER_CROP, 0x00000000 },
83 { BT656_DECODER_SIZE, 0x024002d0 },
84 { BT656_DECODER_HTOTAL_HS_END, 0x0360003f },
85 { BT656_DECODER_VACT_ST_HACT_ST, 0x0016006f },
86 { BT656_DECODER_VTOTAL_VS_END, 0x02710003 },
87 { BT656_DECODER_VS_ST_END_F1, 0x0138013b },
88 { BT656_DECODER_DBG_REG, 0x024002d0 },
89 { BT656_DECODER_CTRL, 0x00000009 },
90 };
91
92 static struct env_config pal_tve_config[] = {
93 { TVE_MODE_CTRL, 0x010ab906 },
94 { TVE_HOR_TIMING1, 0x00c28381 },
95 { TVE_HOR_TIMING2, 0x267d111d },
96 { TVE_HOR_TIMING3, 0x66c00880 },
97 { TVE_SUB_CAR_FRQ, 0x2a098acb },
98 { TVE_IMAGE_POSITION, 0x001500f6 },
99 { TVE_ROUTING, 0x10008882 },
100 { TVE_SYNC_ADJUST, 0x00000000 },
101 { TVE_STATUS, 0x000000b0 },
102 { TVE_CTRL, 0x00000000 },
103 { TVE_INTR_STATUS, 0x00000000 },
104 { TVE_INTR_EN, 0x00000000 },
105 { TVE_INTR_CLR, 0x00000000 },
106 { TVE_COLOR_BUSRT_SAT, 0x00356245 },
107 { TVE_CHROMA_BANDWIDTH, 0x00000022 },
108 { TVE_BRIGHTNESS_CONTRAST, 0x0000aa00 },
109 { TVE_CLAMP, 0x00000000 },
110 };
111
112 #define BT656_ENV_CONFIG_SIZE (sizeof(ntsc_bt656_config) / sizeof(struct env_config))
113 #define TVE_ENV_CONFIG_SIZE (sizeof(ntsc_tve_config) / sizeof(struct env_config))
114
115 #define tve_writel(offset, v) writel(v, tve->reg_base + offset)
116 #define tve_readl(offset) readl(tve->reg_base + offset)
117
118 #define tve_dac_writel(offset, v) writel(v, tve->vdac_base + offset)
119 #define tve_dac_readl(offset) readl(tve->vdac_base + offset)
120
121 #define tve_grf_writel(offset, v) writel(v, tve->grf + offset)
122 #define tve_grf_readl(offset, v) readl(tve->grf + offset)
123
124 struct rockchip_tve_data {
125 int input_format;
126 int soc_type;
127 };
128
129 struct rockchip_tve {
130 struct rockchip_connector connector;
131 struct udevice *dev;
132 void *reg_base;
133 void *vdac_base;
134 int soc_type;
135 int input_format;
136 int tv_format;
137 int test_mode;
138 int saturation;
139 int brightcontrast;
140 int adjtiming;
141 int lumafilter0;
142 int lumafilter1;
143 int lumafilter2;
144 int lumafilter3;
145 int lumafilter4;
146 int lumafilter5;
147 int lumafilter6;
148 int lumafilter7;
149 int daclevel;
150 int dac1level;
151 int preferred_mode;
152 int upsample_mode;
153 u8 vdac_out_current;
154 void *grf;
155 };
156
tve_write_block(struct rockchip_tve * tve,struct env_config * config,int len)157 static void tve_write_block(struct rockchip_tve *tve, struct env_config *config, int len)
158 {
159 int i;
160
161 for (i = 0; i < len; i++)
162 tve_writel(config[i].offset, config[i].value);
163 }
164
tve_set_mode(struct rockchip_tve * tve)165 static void tve_set_mode(struct rockchip_tve *tve)
166 {
167 struct env_config *bt656_cfg, *tve_cfg;
168 int mode = tve->tv_format;
169
170 if (tve->soc_type == SOC_RK3528) {
171 tve_writel(TVE_LUMA_FILTER1, tve->lumafilter0);
172 tve_writel(TVE_LUMA_FILTER2, tve->lumafilter1);
173 tve_writel(TVE_LUMA_FILTER3, tve->lumafilter2);
174 tve_writel(TVE_LUMA_FILTER4, tve->lumafilter3);
175 tve_writel(TVE_LUMA_FILTER5, tve->lumafilter4);
176 tve_writel(TVE_LUMA_FILTER6, tve->lumafilter5);
177 tve_writel(TVE_LUMA_FILTER7, tve->lumafilter6);
178 tve_writel(TVE_LUMA_FILTER8, tve->lumafilter7);
179 } else {
180 if (tve->input_format == INPUT_FORMAT_RGB)
181 tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
182 v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
183 v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(0));
184 else
185 tve_writel(TV_CTRL, v_CVBS_MODE(mode) | v_CLK_UPSTREAM_EN(2) |
186 v_TIMING_EN(2) | v_LUMA_FILTER_GAIN(0) |
187 v_LUMA_FILTER_UPSAMPLE(1) | v_CSC_PATH(3));
188
189 tve_writel(TV_LUMA_FILTER0, tve->lumafilter0);
190 tve_writel(TV_LUMA_FILTER1, tve->lumafilter1);
191 tve_writel(TV_LUMA_FILTER2, tve->lumafilter2);
192 }
193
194 if (mode == TVOUT_CVBS_NTSC) {
195 TVEDBG("tve set ntsc mode\n");
196
197 if (tve->soc_type == SOC_RK3528) {
198 bt656_cfg = ntsc_bt656_config;
199 tve_cfg = ntsc_tve_config;
200
201 tve_write_block(tve, bt656_cfg, BT656_ENV_CONFIG_SIZE);
202 tve_write_block(tve, tve_cfg, TVE_ENV_CONFIG_SIZE);
203 } else {
204 tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(1) |
205 v_Y_AGC_PULSE_ON(0) | v_Y_VIDEO_ON(1) |
206 v_YPP_MODE(1) | v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
207 tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_NTSC) |
208 v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
209 tve_writel(TV_SATURATION, 0x0042543C);
210 if (tve->test_mode)
211 tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00008300);
212 else
213 tve_writel(TV_BRIGHTNESS_CONTRAST, 0x00007900);
214
215 tve_writel(TV_FREQ_SC, 0x21F07BD7);
216 tve_writel(TV_SYNC_TIMING, 0x00C07a81);
217 tve_writel(TV_ADJ_TIMING, 0x96B40000 | 0x70);
218 tve_writel(TV_ACT_ST, 0x001500D6);
219 tve_writel(TV_ACT_TIMING, 0x069800FC | (1 << 12) | (1 << 28));
220 }
221 } else if (mode == TVOUT_CVBS_PAL) {
222 TVEDBG("tve set pal mode\n");
223
224 if (tve->soc_type == SOC_RK3528) {
225 bt656_cfg = pal_bt656_config;
226 tve_cfg = pal_tve_config;
227
228 tve_write_block(tve, bt656_cfg, BT656_ENV_CONFIG_SIZE);
229 tve_write_block(tve, tve_cfg, TVE_ENV_CONFIG_SIZE);
230 } else {
231 tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(0) |
232 v_Y_AGC_PULSE_ON(0) | v_Y_VIDEO_ON(1) |
233 v_YPP_MODE(1) | v_Y_SYNC_ON(1) | v_PIC_MODE(mode));
234 tve_writel(TV_BW_CTRL, v_CHROMA_BW(BP_FILTER_PAL) |
235 v_COLOR_DIFF_BW(COLOR_DIFF_FILTER_BW_1_3));
236
237 tve_writel(TV_SATURATION, tve->saturation);
238 tve_writel(TV_BRIGHTNESS_CONTRAST, tve->brightcontrast);
239
240 tve_writel(TV_FREQ_SC, 0x2A098ACB);
241 tve_writel(TV_SYNC_TIMING, 0x00C28381);
242 tve_writel(TV_ADJ_TIMING, (0xc << 28) | 0x06c00800 | 0x80);
243 tve_writel(TV_ACT_ST, 0x001500F6);
244 tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
245
246 tve_writel(TV_ADJ_TIMING, tve->adjtiming);
247 tve_writel(TV_ACT_TIMING, 0x0694011D | (1 << 12) | (2 << 28));
248 }
249 }
250
251 if (tve->soc_type == SOC_RK3528) {
252 u32 upsample_mode = 0;
253 u32 mask = 0;
254 u32 val = 0;
255 bool upsample_en;
256
257 upsample_en = tve->upsample_mode ? 1 : 0;
258 if (upsample_en)
259 upsample_mode = tve->upsample_mode - 1;
260 mask = m_TVE_DCLK_POL | m_TVE_DCLK_EN | m_DCLK_UPSAMPLE_2X4X |
261 m_DCLK_UPSAMPLE_EN | m_TVE_MODE | m_TVE_EN;
262 val = v_TVE_DCLK_POL(0) | v_TVE_DCLK_EN(1) | v_DCLK_UPSAMPLE_2X4X(upsample_mode) |
263 v_DCLK_UPSAMPLE_EN(upsample_en) | v_TVE_MODE(tve->tv_format) | v_TVE_EN(1);
264
265 tve_grf_writel(RK3528_VO_GRF_CVBS_CON, (mask << 16) | val);
266 }
267 }
268
dac_init(struct rockchip_tve * tve)269 static void dac_init(struct rockchip_tve *tve)
270 {
271 tve_dac_writel(VDAC_VDAC1, v_CUR_REG(tve->dac1level) |
272 m_DR_PWR_DOWN | m_BG_PWR_DOWN);
273 tve_dac_writel(VDAC_VDAC2, v_CUR_CTR(tve->daclevel));
274 tve_dac_writel(VDAC_VDAC3, v_CAB_EN(0));
275 }
276
dac_enable(struct rockchip_tve * tve,bool enable)277 static void dac_enable(struct rockchip_tve *tve, bool enable)
278 {
279 u32 mask = 0;
280 u32 val = 0;
281 u32 grfreg = 0;
282 u32 offset = 0;
283
284 if (enable) {
285 TVEDBG("tve enable\n");
286
287 if (tve->soc_type == SOC_RK3036) {
288 mask = m_VBG_EN | m_DAC_EN | m_DAC_GAIN;
289 val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve->daclevel);
290 grfreg = RK3036_GRF_SOC_CON3;
291 } else if (tve->soc_type == SOC_RK312X) {
292 mask = m_VBG_EN | m_DAC_EN | m_DAC_GAIN;
293 val = m_VBG_EN | m_DAC_EN | v_DAC_GAIN(tve->daclevel);
294 grfreg = RK312X_GRF_TVE_CON;
295 } else if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
296 val = v_CUR_REG(tve->dac1level) | v_DR_PWR_DOWN(0) | v_BG_PWR_DOWN(0);
297 } else if (tve->soc_type == SOC_RK3528) {
298 /*
299 * Reset the vdac
300 */
301 tve_dac_writel(VDAC_CLK_RST, v_ANALOG_RST(0) | v_DIGITAL_RST(0));
302 mdelay(20);
303 tve_dac_writel(VDAC_CLK_RST, v_ANALOG_RST(1) | v_DIGITAL_RST(1));
304
305 tve_dac_writel(VDAC_CURRENT_CTRL, v_OUT_CURRENT(tve->vdac_out_current));
306
307 val = v_REF_VOLTAGE(7) | v_DAC_PWN(1) | v_BIAS_PWN(1);
308 offset = VDAC_PWM_REF_CTRL;
309 }
310 } else {
311 TVEDBG("tve disable\n");
312
313 if (tve->soc_type == SOC_RK312X) {
314 mask = m_VBG_EN | m_DAC_EN;
315 grfreg = RK312X_GRF_TVE_CON;
316 } else if (tve->soc_type == SOC_RK3036) {
317 mask = m_VBG_EN | m_DAC_EN;
318 grfreg = RK3036_GRF_SOC_CON3;
319 } else if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
320 val = v_CUR_REG(tve->dac1level) | m_DR_PWR_DOWN | m_BG_PWR_DOWN;
321 offset = VDAC_VDAC1;
322 } else if (tve->soc_type == SOC_RK3528) {
323 val = v_DAC_PWN(0) | v_BIAS_PWN(0);
324 offset = VDAC_PWM_REF_CTRL;
325 }
326 }
327
328 if (grfreg)
329 tve_grf_writel(grfreg, (mask << 16) | val);
330 else if (tve->vdac_base)
331 tve_dac_writel(offset, val);
332 }
333
rk_get_vdac_value(void)334 static u8 rk_get_vdac_value(void)
335 {
336 u8 value = 0;
337 #ifdef CONFIG_ROCKCHIP_EFUSE
338 #if defined(CONFIG_ROCKCHIP_RK322X)
339 struct udevice *dev;
340 u32 regs[2] = {0};
341 u8 fuses[1];
342 ofnode node;
343 int ret;
344
345 ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(rockchip_efuse), &dev);
346 if (ret) {
347 printf("%s: no misc-device found\n", __func__);
348 return -EINVAL;
349 }
350
351 node = dev_read_subnode(dev, "tve_dac");
352 if (!ofnode_valid(node))
353 return -EINVAL;
354
355 ret = ofnode_read_u32_array(node, "reg", regs, 2);
356 if (ret) {
357 printf("Cannot get efuse reg\n");
358 return -EINVAL;
359 }
360
361 ret = misc_read(dev, regs[0], &fuses, regs[1]);
362 if (ret) {
363 printf("%s: misc_read failed\n", __func__);
364 return 0;
365 }
366
367 value = fuses[0];
368 value = (value >> 3) & 0x1f;
369 #endif
370 #endif /* CONFIG_RK_EFUSE */
371 if (value > 0)
372 value += 5;
373 TVEDBG("%s value = 0x%x\n", __func__, value);
374
375 return value;
376 }
377
378 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
tve_read_otp_by_name(char * name,u8 * val,u8 default_val)379 static int tve_read_otp_by_name(char *name, u8 *val, u8 default_val)
380 {
381 struct udevice *dev;
382 ofnode node;
383 u32 regs[2] = {0};
384 int ret = -EINVAL;
385
386 *val = default_val;
387 if (IS_ENABLED(CONFIG_ROCKCHIP_EFUSE))
388 ret = uclass_get_device_by_driver(UCLASS_MISC,
389 DM_GET_DRIVER(rockchip_efuse),
390 &dev);
391 else
392 ret = uclass_get_device_by_driver(UCLASS_MISC,
393 DM_GET_DRIVER(rockchip_otp),
394 &dev);
395 if (!ret) {
396 node = dev_read_subnode(dev, name);
397 if (ofnode_valid(node)) {
398 if (!ofnode_read_u32_array(node, "reg", regs, 2)) {
399 ret = misc_read(dev, regs[0], val, 1);
400 if (!ret)
401 return 0;
402 }
403 }
404 }
405
406 printf("tve read %s from otp failed, use default\n", name);
407
408 return ret;
409 }
410 #endif
411
tve_parse_dt(struct rockchip_tve * tve)412 static int tve_parse_dt(struct rockchip_tve *tve)
413 {
414 /*
415 * Read vdac output current from OTP if exists, and the default
416 * current val is 0xd2.
417 */
418 u8 out_current = 0xd2;
419 #if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
420 u8 version = 0;
421 int ret = 0;
422
423 ret = tve_read_otp_by_name("vdac-out-current", &out_current, out_current);
424 if (!ret) {
425 if (out_current) {
426 /*
427 * If test version is 0x0, the value of vdac out current
428 * needs to be reduced by one.
429 */
430 ret = tve_read_otp_by_name("test-version", &version, version);
431 if (!ret) {
432 if (version == 0x0)
433 out_current -= 1;
434 }
435 } else {
436 /*
437 * If the current value read from OTP is 0, set it to default.
438 */
439 out_current = 0xd2;
440 }
441
442 }
443 #endif
444 tve->vdac_out_current = out_current;
445
446 tve->preferred_mode = dev_read_u32_default(tve->dev, "rockchip,tvemode", -1);
447 if (tve->preferred_mode < 0) {
448 tve->preferred_mode = 0;
449 } else if (tve->preferred_mode > 1) {
450 printf("tve mode value invalid\n");
451 return -EINVAL;
452 }
453
454 tve->lumafilter0 = dev_read_u32_default(tve->dev, "rockchip,lumafilter0", 0);
455 if (tve->lumafilter0 == 0) {
456 printf("tve get lumafilter0 err\n");
457 return -EINVAL;
458 }
459
460 tve->lumafilter1 = dev_read_u32_default(tve->dev, "rockchip,lumafilter1", 0);
461 if (tve->lumafilter1 == 0) {
462 printf("tve get lumafilter1 err\n");
463 return -EINVAL;
464 }
465
466 tve->lumafilter2 = dev_read_u32_default(tve->dev, "rockchip,lumafilter2", 0);
467 if (tve->lumafilter2 == 0) {
468 printf("tve get lumafilter2 err\n");
469 return -EINVAL;
470 }
471
472 tve->lumafilter3 = dev_read_u32_default(tve->dev, "rockchip,lumafilter3", 0);
473 if (tve->lumafilter3 == 0) {
474 printf("tve get lumafilter3 err\n");
475 return -EINVAL;
476 }
477
478 tve->lumafilter4 = dev_read_u32_default(tve->dev, "rockchip,lumafilter4", 0);
479 if (tve->lumafilter4 == 0) {
480 printf("tve get lumafilter4 err\n");
481 return -EINVAL;
482 }
483
484 tve->lumafilter5 = dev_read_u32_default(tve->dev, "rockchip,lumafilter5", 0);
485 if (tve->lumafilter5 == 0) {
486 printf("tve get lumafilter5 err\n");
487 return -EINVAL;
488 }
489
490 tve->lumafilter6 = dev_read_u32_default(tve->dev, "rockchip,lumafilter6", 0);
491 if (tve->lumafilter6 == 0) {
492 printf("tve get lumafilter6 err\n");
493 return -EINVAL;
494 }
495
496 tve->lumafilter7 = dev_read_u32_default(tve->dev, "rockchip,lumafilter7", 0);
497 if (tve->lumafilter7 == 0) {
498 printf("tve get lumafilter7 err\n");
499 return -EINVAL;
500 }
501
502 tve->upsample_mode = dev_read_u32_default(tve->dev, "rockchip,tve-upsample", -1);
503 if (tve->upsample_mode < 0 || tve->upsample_mode > DCLK_UPSAMPLEx4) {
504 printf("tve get upsample_mode err\n");
505 return -EINVAL;
506 }
507
508 TVEDBG("tve->preferred_mode = 0x%x\n", tve->preferred_mode);
509 TVEDBG("tve->lumafilter0 = 0x%x\n", tve->lumafilter0);
510 TVEDBG("tve->lumafilter1 = 0x%x\n", tve->lumafilter1);
511 TVEDBG("tve->lumafilter2 = 0x%x\n", tve->lumafilter2);
512 TVEDBG("tve->lumafilter3 = 0x%x\n", tve->lumafilter3);
513 TVEDBG("tve->lumafilter4 = 0x%x\n", tve->lumafilter4);
514 TVEDBG("tve->lumafilter5 = 0x%x\n", tve->lumafilter5);
515 TVEDBG("tve->lumafilter6 = 0x%x\n", tve->lumafilter6);
516 TVEDBG("tve->lumafilter7 = 0x%x\n", tve->lumafilter7);
517 TVEDBG("tve->upsample_mode = 0x%x\n", tve->upsample_mode);
518
519 return 0;
520 }
521
tve_parse_dt_legacy(struct rockchip_tve * tve)522 static int tve_parse_dt_legacy(struct rockchip_tve *tve)
523 {
524 int dac_value, getvdac;
525
526 if (tve->soc_type == SOC_RK312X)
527 tve->test_mode = dev_read_u32_default(tve->dev, "test_mode", 0);
528
529 tve->preferred_mode = dev_read_u32_default(tve->dev, "rockchip,tvemode", -1);
530 if (tve->preferred_mode < 0) {
531 tve->preferred_mode = 0;
532 } else if (tve->preferred_mode > 1) {
533 printf("tve mode value invalid\n");
534 return -EINVAL;
535 }
536
537 tve->saturation = dev_read_u32_default(tve->dev, "rockchip,saturation", 0);
538 if (tve->saturation == 0) {
539 printf("tve get saturation err\n");
540 return -EINVAL;
541 }
542
543 tve->brightcontrast = dev_read_u32_default(tve->dev, "rockchip,brightcontrast", 0);
544 if (tve->brightcontrast == 0) {
545 printf("tve get brightcontrast err\n");
546 return -EINVAL;
547 }
548
549 tve->adjtiming = dev_read_u32_default(tve->dev, "rockchip,adjtiming", 0);
550 if (tve->adjtiming == 0) {
551 printf("tve get adjtiming err\n");
552 return -EINVAL;
553 }
554
555 tve->lumafilter0 = dev_read_u32_default(tve->dev, "rockchip,lumafilter0", 0);
556 if (tve->lumafilter0 == 0) {
557 printf("tve get lumafilter0 err\n");
558 return -EINVAL;
559 }
560
561 tve->lumafilter1 = dev_read_u32_default(tve->dev, "rockchip,lumafilter1", 0);
562 if (tve->lumafilter1 == 0) {
563 printf("tve get lumafilter1 err\n");
564 return -EINVAL;
565 }
566
567 tve->lumafilter2 = dev_read_u32_default(tve->dev, "rockchip,lumafilter2", 0);
568 if (tve->lumafilter2 == 0) {
569 printf("tve get lumafilter2 err\n");
570 return -EINVAL;
571 }
572
573 dac_value = dev_read_u32_default(tve->dev, "rockchip,daclevel", 0);
574 if (dac_value == 0) {
575 printf("tve get dac_value err\n");
576 return -EINVAL;
577 }
578
579 tve->daclevel = dac_value;
580 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
581 getvdac = rk_get_vdac_value();
582 if (getvdac > 0) {
583 tve->daclevel = dac_value + getvdac - RK322X_VDAC_STANDARD;
584 if (tve->daclevel > 0x3f || tve->daclevel < 0) {
585 printf("rk322x daclevel error!\n");
586 tve->daclevel = dac_value;
587 }
588 } else if (getvdac < 0) {
589 printf("get rk322x daclevel error\n");
590 return -EINVAL;
591 }
592 }
593
594 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328) {
595 tve->dac1level = dev_read_u32_default(tve->dev, "rockchip,dac1level", 0);
596 if (tve->dac1level == 0) {
597 printf("rk322x dac1level error!\n");
598 return -EINVAL;
599 }
600 }
601
602 TVEDBG("tve->test_mode = 0x%x\n", tve->test_mode);
603 TVEDBG("tve->saturation = 0x%x\n", tve->saturation);
604 TVEDBG("tve->brightcontrast = 0x%x\n", tve->brightcontrast);
605 TVEDBG("tve->adjtiming = 0x%x\n", tve->adjtiming);
606 TVEDBG("tve->lumafilter0 = 0x%x\n", tve->lumafilter0);
607 TVEDBG("tve->lumafilter1 = 0x%x\n", tve->lumafilter1);
608 TVEDBG("tve->lumafilter2 = 0x%x\n", tve->lumafilter2);
609 TVEDBG("tve->daclevel = 0x%x\n", tve->daclevel);
610
611 return 0;
612 }
613
rockchip_drm_tve_init(struct rockchip_connector * conn,struct display_state * state)614 static int rockchip_drm_tve_init(struct rockchip_connector *conn, struct display_state *state)
615 {
616 struct rockchip_tve *tve = dev_get_priv(conn->dev);
617 struct connector_state *conn_state = &state->conn_state;
618 fdt_addr_t addr;
619 int ret;
620
621 conn_state->output_mode = ROCKCHIP_OUT_MODE_P888;
622 conn_state->bus_format = MEDIA_BUS_FMT_YUV8_1X24;
623 if (tve->soc_type == SOC_RK3528)
624 conn_state->output_if |= VOP_OUTPUT_IF_BT656;
625 conn_state->color_encoding = DRM_COLOR_YCBCR_BT601;
626 conn_state->color_range = DRM_COLOR_YCBCR_LIMITED_RANGE;
627
628 conn_state->disp_info = rockchip_get_disp_info(conn_state->type, 0);
629
630 if (tve->soc_type == SOC_RK3528)
631 ret = tve_parse_dt(tve);
632 else
633 ret = tve_parse_dt_legacy(tve);
634 if (ret) {
635 printf("tve parse dts error\n");
636 return -EINVAL;
637 }
638
639 addr = dev_read_addr_index(conn->dev, 0);
640 if (addr == FDT_ADDR_T_NONE) {
641 printf("failed to get tve reg_base\n");
642 return -EINVAL;
643 }
644 tve->reg_base = (void *)addr;
645
646 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328 ||
647 tve->soc_type == SOC_RK3528) {
648 addr = dev_read_addr_index(conn->dev, 1);
649 if (addr == FDT_ADDR_T_NONE) {
650 printf("failed to get tve vdac_base\n");
651 return -EINVAL;
652 }
653 tve->vdac_base = (void *)addr;
654 }
655
656 tve->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
657
658 if (tve->soc_type == SOC_RK322X || tve->soc_type == SOC_RK3328)
659 dac_init(tve);
660
661 return 0;
662 }
663
rockchip_drm_tve_enable(struct rockchip_connector * conn,struct display_state * state)664 static int rockchip_drm_tve_enable(struct rockchip_connector *conn, struct display_state *state)
665 {
666 struct rockchip_tve *tve = dev_get_priv(conn->dev);
667 struct connector_state *conn_state = &state->conn_state;
668 struct drm_display_mode *mode = &conn_state->mode;
669
670 #ifdef CONFIG_ROCKCHIP_INNO_HDMI_PHY
671 /* set inno hdmi phy clk. */
672 if (tve->soc_type != SOC_RK3528)
673 rockchip_phy_set_pll(conn->phy, 27000000);
674 #endif
675 if (mode->vdisplay == 576)
676 tve->tv_format = TVOUT_CVBS_PAL;
677 else
678 tve->tv_format = TVOUT_CVBS_NTSC;
679
680 tve_set_mode(tve);
681 mdelay(1000);
682 dac_enable(tve, true);
683
684 return 0;
685 }
686
rockchip_drm_tve_deinit(struct rockchip_connector * conn,struct display_state * state)687 static void rockchip_drm_tve_deinit(struct rockchip_connector *conn, struct display_state *state)
688 {
689 struct rockchip_tve *tve = dev_get_priv(conn->dev);
690
691 dac_enable(tve, false);
692 }
693
rockchip_drm_tve_prepare(struct rockchip_connector * conn,struct display_state * state)694 static int rockchip_drm_tve_prepare(struct rockchip_connector *conn, struct display_state *state)
695 {
696 return 0;
697 }
698
rockchip_drm_tve_disable(struct rockchip_connector * conn,struct display_state * state)699 static int rockchip_drm_tve_disable(struct rockchip_connector *conn, struct display_state *state)
700 {
701 struct rockchip_tve *tve = dev_get_priv(conn->dev);
702
703 dac_enable(tve, false);
704
705 return 0;
706 }
707
rockchip_drm_tve_detect(struct rockchip_connector * conn,struct display_state * state)708 static int rockchip_drm_tve_detect(struct rockchip_connector *conn, struct display_state *state)
709 {
710 return 1;
711 }
712
tve_select_output(struct rockchip_tve * tve,struct connector_state * conn_state,struct drm_display_mode * mode)713 static void tve_select_output(struct rockchip_tve *tve, struct connector_state *conn_state,
714 struct drm_display_mode *mode)
715 {
716 int ret, i, screen_size;
717 struct base_screen_info *screen_info = NULL;
718 struct base2_screen_info *screen_info2 = NULL;
719 struct base_disp_info base_parameter;
720 struct base2_disp_info *base2_parameter = conn_state->disp_info;
721 struct drm_display_mode modes[2];
722 const struct base_overscan *scan;
723 struct overscan *overscan = &conn_state->overscan;
724 char baseparameter_buf[8 * RK_BLK_SIZE] __aligned(ARCH_DMA_MINALIGN);
725 struct blk_desc *dev_desc;
726 disk_partition_t part_info;
727 int max_scan = 100;
728 int min_scan = 50;
729 int offset = 0;
730 bool found = false;
731
732 for (i = 0; i < 2; i++) {
733 modes[i] = tve_modes[i];
734 if (i == tve->preferred_mode)
735 modes[i].type |= DRM_MODE_TYPE_PREFERRED;
736 }
737 *mode = modes[tve->preferred_mode];
738
739 if (!base2_parameter) {
740 dev_desc = rockchip_get_bootdev();
741 if (!dev_desc) {
742 printf("%s: Could not find device\n", __func__);
743 goto null_basep;
744 }
745
746 ret = part_get_info_by_name(dev_desc, "baseparameter",
747 &part_info);
748 if (ret < 0) {
749 printf("Could not find baseparameter partition\n");
750 goto null_basep;
751 }
752
753 read_aux:
754 ret = blk_dread(dev_desc, part_info.start + offset, 1,
755 (void *)baseparameter_buf);
756 if (ret < 0) {
757 printf("read baseparameter failed\n");
758 goto null_basep;
759 }
760
761 memcpy(&base_parameter, baseparameter_buf,
762 sizeof(base_parameter));
763 scan = &base_parameter.scan;
764
765 screen_size = sizeof(base_parameter.screen_list) /
766 sizeof(base_parameter.screen_list[0]);
767
768 for (i = 0; i < screen_size; i++) {
769 if (base_parameter.screen_list[i].type ==
770 DRM_MODE_CONNECTOR_TV) {
771 found = true;
772 screen_info = &base_parameter.screen_list[i];
773 break;
774 }
775 }
776
777 if (!found && !offset) {
778 printf("cvbs info isn't saved in main block\n");
779 offset += 16;
780 goto read_aux;
781 }
782 } else {
783 scan = &base2_parameter->overscan_info;
784 screen_size = sizeof(base2_parameter->screen_info) /
785 sizeof(base2_parameter->screen_info[0]);
786
787 for (i = 0; i < screen_size; i++) {
788 if (base2_parameter->screen_info[i].type ==
789 DRM_MODE_CONNECTOR_TV) {
790 screen_info2 =
791 &base2_parameter->screen_info[i];
792 break;
793 }
794 }
795 screen_info = malloc(sizeof(*screen_info));
796
797 screen_info->type = screen_info2->type;
798 screen_info->mode = screen_info2->resolution;
799 screen_info->format = screen_info2->format;
800 screen_info->depth = screen_info2->depthc;
801 screen_info->feature = screen_info2->feature;
802 }
803
804 if (scan->leftscale < min_scan && scan->leftscale > 0)
805 overscan->left_margin = min_scan;
806 else if (scan->leftscale < max_scan && scan->leftscale > 0)
807 overscan->left_margin = scan->leftscale;
808
809 if (scan->rightscale < min_scan && scan->rightscale > 0)
810 overscan->right_margin = min_scan;
811 else if (scan->rightscale < max_scan && scan->rightscale > 0)
812 overscan->right_margin = scan->rightscale;
813
814 if (scan->topscale < min_scan && scan->topscale > 0)
815 overscan->top_margin = min_scan;
816 else if (scan->topscale < max_scan && scan->topscale > 0)
817 overscan->top_margin = scan->topscale;
818
819 if (scan->bottomscale < min_scan && scan->bottomscale > 0)
820 overscan->bottom_margin = min_scan;
821 else if (scan->bottomscale < max_scan && scan->bottomscale > 0)
822 overscan->bottom_margin = scan->bottomscale;
823
824 null_basep:
825
826 if (screen_info)
827 printf("cvbs base_parameter.mode:%dx%d\n",
828 screen_info->mode.hdisplay,
829 screen_info->mode.vdisplay);
830
831 if (screen_info &&
832 (screen_info->mode.hdisplay == 720 &&
833 screen_info->mode.vdisplay == 576))
834 *mode = modes[0];
835 else if (screen_info &&
836 (screen_info->mode.hdisplay == 720 &&
837 screen_info->mode.vdisplay == 480))
838 *mode = modes[1];
839 }
840
rockchip_drm_tve_get_timing(struct rockchip_connector * conn,struct display_state * state)841 static int rockchip_drm_tve_get_timing(struct rockchip_connector *conn, struct display_state *state)
842 {
843 struct rockchip_tve *tve = dev_get_priv(conn->dev);
844 struct connector_state *conn_state = &state->conn_state;
845 struct drm_display_mode *mode = &conn_state->mode;
846
847 tve_select_output(tve, conn_state, mode);
848
849 return 0;
850 }
851
852 const struct rockchip_connector_funcs rockchip_drm_tve_funcs = {
853 .init = rockchip_drm_tve_init,
854 .deinit = rockchip_drm_tve_deinit,
855 .prepare = rockchip_drm_tve_prepare,
856 .enable = rockchip_drm_tve_enable,
857 .disable = rockchip_drm_tve_disable,
858 .get_timing = rockchip_drm_tve_get_timing,
859 .detect = rockchip_drm_tve_detect,
860 };
861
rockchip_drm_tve_probe(struct udevice * dev)862 static int rockchip_drm_tve_probe(struct udevice *dev)
863 {
864 struct rockchip_tve *tve = dev_get_priv(dev);
865 const struct rockchip_tve_data *data;
866
867 tve->dev = dev;
868 data = (const struct rockchip_tve_data *)dev_get_driver_data(dev);
869 tve->soc_type = data->soc_type;
870 tve->input_format = data->input_format;
871
872 rockchip_connector_bind(&tve->connector, dev, 0, &rockchip_drm_tve_funcs, NULL, DRM_MODE_CONNECTOR_TV);
873
874 return 0;
875 }
876
877 static const struct rockchip_tve_data rk3036_tve = {
878 .soc_type = SOC_RK3036,
879 .input_format = INPUT_FORMAT_RGB,
880 };
881
882 static const struct rockchip_tve_data rk312x_tve = {
883 .soc_type = SOC_RK312X,
884 .input_format = INPUT_FORMAT_RGB,
885 };
886
887 static const struct rockchip_tve_data rk322x_tve = {
888 .soc_type = SOC_RK322X,
889 .input_format = INPUT_FORMAT_YUV,
890 };
891
892 static const struct rockchip_tve_data rk3328_tve = {
893 .soc_type = SOC_RK3328,
894 .input_format = INPUT_FORMAT_YUV,
895 };
896
897 static const struct rockchip_tve_data rk3528_tve = {
898 .soc_type = SOC_RK3528,
899 .input_format = INPUT_FORMAT_YUV,
900 };
901
902 static const struct udevice_id rockchip_drm_tve_ids[] = {
903 { .compatible = "rockchip,rk3036-tve", .data = (ulong)&rk3036_tve },
904 { .compatible = "rockchip,rk312x-tve", .data = (ulong)&rk312x_tve },
905 { .compatible = "rockchip,rk322x-tve", .data = (ulong)&rk322x_tve },
906 { .compatible = "rockchip,rk3328-tve", .data = (ulong)&rk3328_tve },
907 { .compatible = "rockchip,rk3528-tve", .data = (ulong)&rk3528_tve },
908 };
909
910 U_BOOT_DRIVER(rockchip_drm_tve) = {
911 .name = "rockchip_drm_tve",
912 .id = UCLASS_DISPLAY,
913 .of_match = rockchip_drm_tve_ids,
914 .probe = rockchip_drm_tve_probe,
915 .priv_auto_alloc_size = sizeof(struct rockchip_tve),
916 };
917