1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
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10 // permission has been granted by MStar.
11 //
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15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 // Software and any modification/derivatives thereof.
18 // No right, ownership, or interest to MStar Software and any
19 // modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 // supplied together with third party`s software and the use of MStar
23 // Software may require additional licenses from third parties.
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32 //
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75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2006-2008 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // (��MStar Confidential Information��) by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
88 // copying, use, reproduction, sale, distribution, modification, disassembling,
89 // reverse engineering and compiling of the contents of MStar Confidential
90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95
96 //-------------------------------------------------------------------------------------------------
97 // Include Files
98 //-------------------------------------------------------------------------------------------------
99 #include "MsCommon.h"
100 #include "MsTypes.h"
101 #include "regSEAL.h"
102 #include "halSEAL.h"
103 #include "drvSEAL.h"
104 #include "halCHIP.h"
105
106 //-------------------------------------------------------------------------------------------------
107 // Driver Compiler Options
108 //-------------------------------------------------------------------------------------------------
109
110
111 //-------------------------------------------------------------------------------------------------
112 // Local Defines
113 //-------------------------------------------------------------------------------------------------
114 #define HAL_SEAL_DBG(x) //x
115 #define HAL_SEAL_ERR(x, args...) {printf(x, ##args);}
116 #define SEAL_BANK_RIU_NUM (0x80UL)
117 #define SEAL_SECURE_RANGE_RIU_NUM (0x40UL)
118
119 //Non PM IP group
120 #define SEAL_NON_PM_GROUP0 \
121 E_SEAL_RIU_DBG_PROT_NONPM, \
122 E_SEAL_MSPI0_PROT_NONPM, \
123 E_SEAL_VD_MHEG5_PROT_NONPM, \
124 E_SEAL_MAU1_PROT_NONPM, \
125 E_SEAL_HIREG_PROT_NONPM, \
126 E_SEAL_POR_STATUS_PROT_NONPM, \
127 E_SEAL_INTR_CPUINT_PROT_NONPM, \
128 E_SEAL_NORPF_PROT_NONPM, \
129 E_SEAL_MIU2_PROT_NONPM, \
130 E_SEAL_USB0_PROT_NONPM, \
131 E_SEAL_USB1_PROT_NONPM, \
132 E_SEAL_UPLL0_PROT_NONPM, \
133 E_SEAL_UPLL1_PROT_NONPM, \
134 E_SEAL_BDMA_CH0_PROT_NONPM, \
135 E_SEAL_BDMA_CH1_PROT_NONPM, \
136 E_SEAL_UART3_PROT_NONPM
137
138 #define SEAL_NON_PM_GROUP1 \
139 E_SEAL_UART0_PROT_NONPM, \
140 E_SEAL_UART4_PROT_NONPM, \
141 E_SEAL_MSPI1_PROT_NONPM, \
142 E_SEAL_CLKGEN0_PROT_NONPM, \
143 E_SEAL_DSCRMB_PROT_NONPM, \
144 E_SEAL_UHC1_PROT_NONPM, \
145 E_SEAL_SPI_PRE_ARB_PROT_NONPM, \
146 E_SEAL_INTR_CTRL1_PROT_NONPM, \
147 E_SEAL_MVD_PROT_NONPM, \
148 E_SEAL_MIU_PROT_NONPM, \
149 E_SEAL_MVOPSUB_PROT_NONPM, \
150 E_SEAL_MVOP_PROT_NONPM, \
151 E_SEAL_TSP0_PROT_NONPM, \
152 E_SEAL_TSP1_PROT_NONPM, \
153 E_SEAL_JPD_PROT_NONPM, \
154 E_SEAL_SEMAPH_PROT_NONPM
155
156 #define SEAL_NON_PM_GROUP2 \
157 E_SEAL_ECBRIDGE_PROT_NONPM, \
158 E_SEAL_INTR_CTRL_PROT_NONPM, \
159 E_SEAL_HDMI2_PROT_NONPM, \
160 E_SEAL_HVD_PROT_NONPM, \
161 E_SEAL_TSP2_PROT_NONPM, \
162 E_SEAL_MIPS_PROT_NONPM, \
163 E_SEAL_CHIP_PROT_NONPM, \
164 E_SEAL_GOP_PROT_NONPM, \
165 E_SEAL_EMAC0_PROT_NONPM, \
166 E_SEAL_EMAC1_PROT_NONPM, \
167 E_SEAL_EMAC2_PROT_NONPM, \
168 E_SEAL_EMAC3_PROT_NONPM, \
169 E_SEAL_UHC0_PROT_NONPM, \
170 E_SEAL_ADC_ATOP_PROT_NONPM, \
171 E_SEAL_ADC_DTOP_PROT_NONPM, \
172 E_SEAL_HDMI_PROT_NONPM
173
174 #define SEAL_NON_PM_GROUP3 \
175 E_SEAL_GE0_PROT_NONPM, \
176 E_SEAL_SMART_PROT_NONPM, \
177 E_SEAL_CI_PROT_NONPM, \
178 E_SEAL_MIIC0_PROT_NONPM, \
179 E_SEAL_MIIC1_PROT_NONPM, \
180 E_SEAL_MIIC2_PROT_NONPM, \
181 E_SEAL_MIIC3_PROT_NONPM, \
182 E_SEAL_LDM_DMA0_PROT_NONPM, \
183 E_SEAL_SC0_PROT_NONPM, \
184 E_SEAL_SC1_PROT_NONPM, \
185 E_SEAL_SC2_PROT_NONPM, \
186 E_SEAL_SC3_PROT_NONPM, \
187 E_SEAL_SC4_PROT_NONPM, \
188 E_SEAL_CLKGEN1_PROT_NONPM, \
189 E_SEAL_MAILBOX_PROT_NONPM, \
190 E_SEAL_MIIC_PROT_NONPM
191
192 #define SEAL_NON_PM_GROUP4 \
193 E_SEAL_PCM_PROT_NONPM, \
194 E_SEAL_VDMCU51_IF_PROT_NONPM, \
195 E_SEAL_DMDMCU51_IF_PROT_NONPM, \
196 E_SEAL_PM_PROT_NONPM, \
197 E_SEAL_URDMA_PROT_NONPM, \
198 E_SEAL_AFEC_PROT_NONPM, \
199 E_SEAL_COMB_PROT_NONPM, \
200 E_SEAL_VBI_PROT_NONPM, \
201 E_SEAL_SCM_PROT_NONPM, \
202 E_SEAL_PATGEN_PROT_NONPM, \
203 E_SEAL_UTMI1_PROT_NONPM, \
204 E_SEAL_UTMI_PROT_NONPM, \
205 E_SEAL_VE_0_PROT_NONPM, \
206 E_SEAL_REG_PIU_NONPM_PROT_NONPM, \
207 E_SEAL_ADC_ATOPB_PROT_NONPM, \
208 E_SEAL_VE_1_PROT_NONPM
209
210 #define SEAL_NON_PM_GROUP5 \
211 E_SEAL_VE_2_PROT_NONPM, \
212 E_SEAL_MPIF_PROT_NONPM, \
213 E_SEAL_MIIC4_PROT_NONPM, \
214 E_SEAL_MIIC5_PROT_NONPM, \
215 E_SEAL_UART1_PROT_NONPM, \
216 E_SEAL_UART2_PROT_NONPM, \
217 E_SEAL_FUART_PROT_NONPM, \
218 E_SEAL_UART5_PROT_NONPM, \
219 E_SEAL_GE1_PROT_NONPM, \
220 E_SEAL_G3D_PROT_NONPM, \
221 E_SEAL_DVI_ATOP_PROT_NONPM, \
222 E_SEAL_DVI_DTOP_PROT_NONPM, \
223 E_SEAL_DVIEQ_PROT_NONPM, \
224 E_SEAL_HDCP_PROT_NONPM, \
225 E_SEAL_TS_SAMPLE_NONPM, \
226 E_SEAL_ANA_MISC_PROT_NONPM
227
228 #define SEAL_NON_PM_GROUP6 \
229 E_SEAL_MIU_ATOP_PROT_NONPM, \
230 E_SEAL_UTMI3_PROT_NONPM, \
231 E_SEAL_UTMI2_PROT_NONPM, \
232 E_SEAL_UHC3_PROT_NONPM, \
233 E_SEAL_MFE0_PROT_NONPM, \
234 E_SEAL_MFE1_PROT_NONPM, \
235 E_SEAL_ADC_DTOPB_PROT_NONPM, \
236 E_SEAL_NFIE0_PROT_NONPM, \
237 E_SEAL_NFIE1_PROT_NONPM, \
238 E_SEAL_NFIE2_PROT_NONPM, \
239 E_SEAL_LDM_DMA1_PROT_NONPM, \
240 E_SEAL_DMD_MCU2_PROT_NONPM, \
241 E_SEAL_CLKGEN_DMD_PROT_NONPM, \
242 E_SEAL_DEMOD_0_PROT_NONPM, \
243 E_SEAL_DEMOD_1_PROT_NONPM, \
244 E_SEAL_DEMOD_2_PROT_NONPM
245
246 #define SEAL_NON_PM_GROUP7 \
247 E_SEAL_DEMOD_3_PROT_NONPM, \
248 E_SEAL_DEMOD_4_PROT_NONPM, \
249 E_SEAL_DEMOD_5_PROT_NONPM, \
250 E_SEAL_DEMOD_6_PROT_NONPM, \
251 E_SEAL_DEMOD_7_PROT_NONPM, \
252 E_SEAL_DMD_ANA_MISC_PROT_NONPM, \
253 E_SEAL_AUR20_PROT_NONPM, \
254 E_SEAL_VIVALDI0_PROT_NONPM, \
255 E_SEAL_VIVALDI1_PROT_NONPM, \
256 E_SEAL_VIVALDI2_PROT_NONPM, \
257 E_SEAL_VIVALDI3_PROT_NONPM, \
258 E_SEAL_VIVALDI4_PROT_NONPM, \
259 E_SEAL_VIVALDI5_PROT_NONPM, \
260 E_SEAL_AUR21_PROT_NONPM, \
261 E_SEAL_AUR22_PROT_NONPM, \
262 E_SEAL_DVI_ATOP_1_PROT_NONPM
263
264 #define SEAL_NON_PM_GROUP8 \
265 E_SEAL_DVI_DTOP_1_PROT_NONPM, \
266 E_SEAL_DVIEQ_1_PROT_NONPM, \
267 E_SEAL_HDCP_1_PROT_NONPM, \
268 E_SEAL_DVI_ATOP_2_PROT_NONPM, \
269 E_SEAL_DVI_DTOP_2_PROT_NONPM, \
270 E_SEAL_DVIEQ_2_PROT_NONPM, \
271 E_SEAL_HDCP_2_PROT_NONPM, \
272 E_SEAL_DVI_PS_PROT_NONPM, \
273 E_SEAL_DVI_DTOP_3_PROT_NONPM, \
274 E_SEAL_DVIEQ_3_PROT_NONPM, \
275 E_SEAL_HDCP_3_PROT_NONPM, \
276 E_SEAL_USB2_PROT_NONPM, \
277 E_SEAL_USB3_PROT_NONPM, \
278 E_SEAL_UHC2_PROT_NONPM, \
279 E_SEAL_TSO_PROT_NONPM, \
280 E_SEAL_DRM_SECURE_PROT_NONPM
281
282 #define SEAL_NON_PM_GROUP9 \
283 E_SEAL_DSCRMB2_PROT_NONPM, \
284 E_SEAL_DSCRMB3_PROT_NONPM, \
285 E_SEAL_GPD0_PROT_NONPM, \
286 E_SEAL_GPD1_PROT_NONPM, \
287 E_SEAL_GOP4G_0_PROT_NONPM, \
288 E_SEAL_GOP4G_1_PROT_NONPM, \
289 E_SEAL_GOP4G_ST_PROT_NONPM, \
290 E_SEAL_GOP2G_0_PROT_NONPM, \
291 E_SEAL_GOP2G_1_PROT_NONPM, \
292 E_SEAL_GOP2G_ST_PROT_NONPM, \
293 E_SEAL_GOP1G_0_PROT_NONPM, \
294 E_SEAL_GOP1G_1_PROT_NONPM, \
295 E_SEAL_GOP1G_ST_PROT_NONPM, \
296 E_SEAL_GOP1GX_0_PROT_NONPM, \
297 E_SEAL_GOP1GX_1_PROT_NONPM, \
298 E_SEAL_GOP1GX_ST_PROT_NONPM
299
300 #define SEAL_NON_PM_GROUP10 \
301 E_SEAL_GOPD_PROT_NONPM, \
302 E_SEAL_CHIPGPIO_PROT_NONPM, \
303 E_SEAL_SPARE1_PROT_NONPM, \
304 E_SEAL_SPARE2_PROT_NONPM, \
305 E_SEAL_SPARE3_PROT_NONPM, \
306 E_SEAL_SWCD_PROT_NONPM, \
307 E_SEAL_SPARE4_PROT_NONPM, \
308 E_SEAL_SPARE5_PROT_NONPM, \
309 E_SEAL_TZPC_NONPM2_NONPM, \
310 E_SEAL_SPARE6_PROT_NONPM, \
311 E_SEAL_SPARE7_PROT_NONPM, \
312 E_SEAL_MHL_TMDS_PROT_NONPM, \
313 E_SEAL_SEC_R2_PROT_NONPM, \
314 E_SEAL_SEC_MAU0_PROT_NONPM, \
315 E_SEAL_DSCRMB4_PROT_NONPM, \
316 E_SEAL_MAU0_PROT_NONPM
317
318 #define SEAL_NON_PM_GROUP11 \
319 E_SEAL_USBC0_PROT_NONPM, \
320 E_SEAL_USBC1_PROT_NONPM, \
321 E_SEAL_USBC2_PROT_NONPM, \
322 E_SEAL_USBC3_PROT_NONPM, \
323 E_SEAL_SECURERANGE0_PROT_NONPM, \
324 E_SEAL_SECURERANGE1_PROT_NONPM, \
325 E_SEAL_TZPC_NONPM_PROT_NONPM, \
326 E_SEAL_HDCPKEY_PROT_NONPM, \
327 E_SEAL_NFIE3_PROT_NONPM, \
328 E_SEAL_DSCRMB5_PROT_NONPM, \
329 E_SEAL_TSO1_NONPM, \
330 E_SEAL_EMMC_PLL_PROT_NONPM, \
331 E_SEAL_MSC_PROT_NONPM, \
332 E_SEAL_PATGEN_DEMOD_PROT_NONPM, \
333 E_SEAL_PATGEN_DEMOD1_PROT_NONPM, \
334 E_SEAL_PATGEN_SC0_PROT_NONPM
335
336 #define SEAL_NON_PM_GROUP12 \
337 E_SEAL_MIU_BWFLAG_PROT_NONPM, \
338 E_SEAL_MIU_BWFLAG2_PROT_NONPM, \
339 E_SEAL_TSP7_PROT_NONPM, \
340 E_SEAL_MIU_ARBB_NONPM, \
341 E_SEAL_MIU_ARBB2_NONPM, \
342 E_SEAL_COMB1_PROT_NONPM, \
343 E_SEAL_COMB2_PROT_NONPM, \
344 E_SEAL_COMB3_PROT_NONPM, \
345 E_SEAL_COMB4_PROT_NONPM, \
346 E_SEAL_COMB5_PROT_NONPM, \
347 E_SEAL_DEMOD_8_PROT_NONPM, \
348 E_SEAL_DEMOD_9_PROT_NONPM, \
349 E_SEAL_MIU_DIG_E_PROT_NONPM, \
350 E_SEAL_MIU_DIG_E2_PROT_NONPM, \
351 E_SEAL_VIVALDId_PROT_NONPM, \
352 E_SEAL_USB0_MIUPROT_PROT_NONPM
353
354 #define SEAL_NON_PM_GROUP13 \
355 E_SEAL_USB1_MIUPROT_PROT_NONPM, \
356 E_SEAL_USB2_MIUPROT_PROT_NONPM, \
357 E_SEAL_USB3_MIUPROT_PROT_NONPM, \
358 E_SEAL_VIVALDI6_PROT_NONPM, \
359 E_SEAL_VIVALDI7_PROT_NONPM, \
360 E_SEAL_PCM2_PROT_NONPM, \
361 E_SEAL_TSP3_PROT_NONPM, \
362 E_SEAL_EVD_NONPM, \
363 E_SEAL_GPU2MIU_MASK_PROT_NONPM, \
364 E_SEAL_GPU_PLL_PROT_NONPM, \
365 E_SEAL_MIU_ARB_SC_NONPM, \
366 E_SEAL_MIU_ARB2_SC_NONPM, \
367 E_SEAL_MIU_ARB_NONPM, \
368 E_SEAL_MIU_ATOP2_PROT_NONPM, \
369 E_SEAL_TSP4_NONPM, \
370 E_SEAL_TSP6_PROT_NONPM
371
372 #define SEAL_NON_PM_GROUP14 \
373 E_SEAL_MIU_ARB2_NONPM, \
374 E_SEAL_VIVALDIc_PROT_NONPM, \
375 E_SEAL_GE2_NONPM, \
376 E_SEAL_GE3_NONPM, \
377 E_SEAL_HDCP22_P0_NONPM, \
378 E_SEAL_HDCP22_P1_NONPM, \
379 E_SEAL_HDCP22_P2_NONPM, \
380 E_SEAL_HDCP22_P3_NONPM, \
381 E_SEAL_DVI_ATOP3_NONPM, \
382 E_SEAL_SPI2FCIE_PROT_NONPM, \
383 E_SEAL_TSP5_NONPM, \
384 E_SEAL_VIVALDI8_PROT_NONPM, \
385 E_SEAL_VIVALDI9_PROT_NONPM, \
386 E_SEAL_VIVALDIa_0_PROT_NONPM, \
387 E_SEAL_VIVALDIa_1_PROT_NONPM, \
388 E_SEAL_VIVALDIa_2_PROT_NONPM
389
390 #define SEAL_NON_PM_GROUP15 \
391 E_SEAL_VIVALDIa_3_PROT_NONPM, \
392 E_SEAL_VIVALDIb_PROT_NONPM, \
393 E_SEAL_DSCRMB6_PROT_NONPM, \
394 E_SEAL_DSCRMB7_PROT_NONPM, \
395 E_SEAL_X32_GPUAPB0_PROT_NONPM, \
396 E_SEAL_X32_GPUAPB1_PROT_NONPM, \
397 E_SEAL_X32_GPUAPB2_PROT_NONPM, \
398 E_SEAL_X32_EMAC0_NONPM, \
399 E_SEAL_X32_EMAC1_NONPM, \
400 E_SEAL_X32_EMAC2_NONPM, \
401 E_SEAL_X32_CPUAPB0_NONPM, \
402 E_SEAL_DUMMY, \
403 E_SEAL_DUMMY, \
404 E_SEAL_DUMMY, \
405 E_SEAL_DUMMY, \
406 E_SEAL_DUMMY
407
408 //PM IP group
409 #define SEAL_PM_GROUP0 \
410 E_SEAL_RIU_DBG_PROT_PM, \
411 E_SEAL_MENULOAD_PROT_PM, \
412 E_SEAL_GDMA_PROT_PM, \
413 E_SEAL_DDC_PROT_PM, \
414 E_SEAL_PM_POR_PROT_PM, \
415 E_SEAL_ISP_PROT_PM, \
416 E_SEAL_FSP_PROT_PM, \
417 E_SEAL_QSPI_PROT_PM, \
418 E_SEAL_PM_SLEEP_PROT_PM, \
419 E_SEAL_PM_GPIO_PROT_PM, \
420 E_SEAL_MCU_PROT_PM, \
421 E_SEAL_PM_CEC_PROT_PM, \
422 E_SEAL_PM_RTC0_PROT_PM, \
423 E_SEAL_PM_RTC1_PROT_PM, \
424 E_SEAL_PM_SAR_PROT_PM, \
425 E_SEAL_PM_AV_LINK_PROT_PM
426
427 #define SEAL_PM_GROUP1 \
428 E_SEAL_PM_TOP_PROT_PM, \
429 E_SEAL_MHL_CBUS_PROT_PM, \
430 E_SEAL_EFUSE_PROT_PM, \
431 E_SEAL_IRQ_PROT_PM, \
432 E_SEAL_CACHE_PROT_PM, \
433 E_SEAL_XDMIU_PROT_PM, \
434 E_SEAL_PM_MISC_PROT_PM, \
435 E_SEAL_PM_MHL_CBUS_PROT_PM, \
436 E_SEAL_WDT_PROT_PM, \
437 E_SEAL_TIMER0_PROT_PM, \
438 E_SEAL_TIMER1_PROT_PM, \
439 E_SEAL_TIMER2_PROT_PM, \
440 E_SEAL_ALBANY0_PROT_PM, \
441 E_SEAL_ALBANY1_PROT_PM, \
442 E_SEAL_ALBANY2_PROT_PM, \
443 E_SEAL_DID_KEY_PROT_PM
444
445 #define SEAL_PM_GROUP2 \
446 E_SEAL_TZPC_PROT_PM, \
447 E_SEAL_STR_PROT_PM, \
448 E_SEAL_REG_PIU_MISC_0_PROT_PM, \
449 E_SEAL_IR_PROT_PM, \
450 E_SEAL_PM_SPARE0_PROT_PM, \
451 E_SEAL_PM_SPARE1_PROT_PM, \
452 E_SEAL_DUMMY, \
453 E_SEAL_DUMMY, \
454 E_SEAL_DUMMY, \
455 E_SEAL_DUMMY, \
456 E_SEAL_DUMMY, \
457 E_SEAL_DUMMY, \
458 E_SEAL_DUMMY, \
459 E_SEAL_DUMMY, \
460 E_SEAL_DUMMY, \
461 E_SEAL_DUMMY
462
463 #define SEAL_PM_GROUP3 \
464 E_SEAL_DUMMY, \
465 E_SEAL_DUMMY, \
466 E_SEAL_DUMMY, \
467 E_SEAL_DUMMY, \
468 E_SEAL_DUMMY, \
469 E_SEAL_DUMMY, \
470 E_SEAL_DUMMY, \
471 E_SEAL_DUMMY, \
472 E_SEAL_DUMMY, \
473 E_SEAL_DUMMY, \
474 E_SEAL_DUMMY, \
475 E_SEAL_DUMMY, \
476 E_SEAL_DUMMY, \
477 E_SEAL_DUMMY, \
478 E_SEAL_DUMMY, \
479 E_SEAL_DUMMY
480
481
482 //processor group
483 #define SEAL_PROCESSOR_GROUP0 \
484 E_SEAL_DBBUS, \
485 E_SEAL_MCU51, \
486 E_SEAL_CPU2, \
487 E_SEAL_VD_R2, \
488 E_SEAL_SECURE_R2, \
489 E_SEAL_SC, \
490 E_SEAL_CMDQ, \
491 E_SEAL_HEMCU ,\
492 E_SEAL_PROCESSOR_NUM
493
494 //lock group
495 #define SEAL_LOCK_GROUP0 \
496 E_SEAL_SC_WP_DIPW, \
497 E_SEAL_SC_RP_DIPW, \
498 E_SEAL_SC_WP_DIPR, \
499 E_SEAL_SC_RP_DIPR, \
500 E_SEAL_AUDIO_LCL_R2_WR_PROTN_0, \
501 E_SEAL_AUDIO_LCL_R2_WR_PROTN_1, \
502 E_SEAL_AUDIO_LCL_R2_WR_PROTN_2, \
503 E_SEAL_AUDIO_LCL_R2_WR_PROTN_3, \
504 E_SEAL_AUDIO_SCL_R2_WR_PROTN_0, \
505 E_SEAL_AUDIO_SCL_R2_WR_PROTN_1, \
506 E_SEAL_AUDIO_SCL_R2_WR_PROTN_2, \
507 E_SEAL_AUDIO_SCL_R2_WR_PROTN_3, \
508 E_SEAL_SECURE_R2_WR_PROTN_0, \
509 E_SEAL_SECURE_R2_WR_PROTN_1, \
510 E_SEAL_SECURE_R2_WR_PROTN_2, \
511 E_SEAL_SECURE_R2_WR_PROTN_3
512
513 #define SEAL_LOCK_GROUP1 \
514 E_SEAL_CIPHERENG_WP_SYSKEY, \
515 E_SEAL_CIPHERENG_RP_SYSKEY, \
516 E_SEAL_DSCRMB_WP_RIV0, \
517 E_SEAL_DSCRMB_RP_RIV0, \
518 E_SEAL_DSCRMB_WP_RIV1, \
519 E_SEAL_DSCRMB_RP_RIV1, \
520 E_SEAL_DSCRMB_WP_WDATA, \
521 E_SEAL_DSCRMB_RP_WDATA, \
522 E_SEAL_DSCRMB_WP_RIV2, \
523 E_SEAL_DSCRMB_RP_RIV2, \
524 E_SEAL_DSCRMB_WP_RIV3, \
525 E_SEAL_DSCRMB_RP_RIV3, \
526 E_SEAL_SC2_WP_SCM_M, \
527 E_SEAL_SC2_RP_SCM_M, \
528 E_SEAL_LOCK_DUMMY, \
529 E_SEAL_LOCK_DUMMY
530
531 #define SEAL_LOCK_GROUP2 \
532 E_SEAL_DSCRMB_RP_RDATA, \
533 E_SEAL_LOCK_DUMMY, \
534 E_SEAL_LOCK_DUMMY, \
535 E_SEAL_LOCK_DUMMY, \
536 E_SEAL_RNG_PROTECT, \
537 E_SEAL_RSA_PROTECT, \
538 E_SEAL_SHA_PROTECT, \
539 E_SEAL_LOCK_DUMMY, \
540 E_SEAL_EVD_R2_WR_PROTN_0, \
541 E_SEAL_EVD_R2_WR_PROTN_1, \
542 E_SEAL_EVD_R2_WR_PROTN_2, \
543 E_SEAL_EVD_R2_WR_PROTN_3, \
544 E_SEAL_HVD_R2_WR_PROTN_0, \
545 E_SEAL_HVD_R2_WR_PROTN_1, \
546 E_SEAL_HVD_R2_WR_PROTN_2, \
547 E_SEAL_HVD_R2_WR_PROTN_3
548
549 #define SEAL_LOCK_GROUP3 \
550 E_SEAL_HVD_ES0_BUF, \
551 E_SEAL_HVD_ES1_BUF, \
552 E_SEAL_HVD_ES2_BUF, \
553 E_SEAL_LOCK_DUMMY, \
554 E_SEAL_MFE0_ES_BUF, \
555 E_SEAL_MVD_WR_PROTN_0, \
556 E_SEAL_MVD_WR_PROTN_1, \
557 E_SEAL_MVD_WR_PROTN_2, \
558 E_SEAL_EVD_0_WR_PROTN_0, \
559 E_SEAL_EVD_1_WR_PROTN_0, \
560 E_SEAL_MHEG5_WR_PROTN_0, \
561 E_SEAL_AUDIO_DSP_ES_PROTN, \
562 E_SEAL_AUDIO_DSP_CACHE_PROTN, \
563 E_SEAL_EVD_0_WR_PROTN_1, \
564 E_SEAL_EVD_1_WR_PROTN_1, \
565 E_SEAL_VP9_TOP
566
567 #define SEAL_LOCK_GROUP4 \
568 E_SEAL_TSO_WP_TSOFI, \
569 E_SEAL_TSO_RP_TSOFI, \
570 E_SEAL_MMFI_WP_MMFI0, \
571 E_SEAL_MMFI_RP_MMFI0, \
572 E_SEAL_MMFI_WP_MMFI1, \
573 E_SEAL_MMFI_RP_MMFI1, \
574 E_SEAL_TSP0_WP_PVR, \
575 E_SEAL_TSP0_RP_PVR, \
576 E_SEAL_TSP0_WP_PVR1, \
577 E_SEAL_TSP0_RP_PVR1, \
578 E_SEAL_TSP0_WP_FILEIN, \
579 E_SEAL_TSP0_RP_FILEIN, \
580 E_SEAL_TSP0_WP_QMEM, \
581 E_SEAL_TSP0_RP_QMEM, \
582 E_SEAL_TSP0_WP_FW, \
583 E_SEAL_TSP0_RP_FW
584
585 #define SEAL_LOCK_GROUP5 \
586 E_SEAL_VE_WP, \
587 E_SEAL_VE_RP, \
588 E_SEAL_SC_WP_OD, \
589 E_SEAL_SC_RP_OD, \
590 E_SEAL_SC_WP_SCM_M, \
591 E_SEAL_SC_RP_SCM_M, \
592 E_SEAL_SC_WP_SCM_S, \
593 E_SEAL_SC_RP_SCM_S, \
594 E_SEAL_SC_WP_PDW0, \
595 E_SEAL_SC_RP_PDW0, \
596 E_SEAL_SC_WP_PDW1, \
597 E_SEAL_SC_RP_PDW1, \
598 E_SEAL_SC_WP_OPW, \
599 E_SEAL_SC_RP_OPW, \
600 E_SEAL_GOPD_PROTN, \
601 E_SEAL_LOCK_DUMMY
602
603 #define SEAL_LOCK_GROUP6 \
604 E_SEAL_GE0_SB_PROTN, \
605 E_SEAL_GE0_DB_PROTN, \
606 E_SEAL_GE1_SB_PROTN, \
607 E_SEAL_GE1_DB_PROTN, \
608 E_SEAL_LOCK_DUMMY, \
609 E_SEAL_LOCK_DUMMY, \
610 E_SEAL_LOCK_DUMMY, \
611 E_SEAL_LOCK_DUMMY, \
612 E_SEAL_LOCK_DUMMY, \
613 E_SEAL_LOCK_DUMMY, \
614 E_SEAL_LOCK_DUMMY, \
615 E_SEAL_LOCK_DUMMY, \
616 E_SEAL_LOCK_DUMMY, \
617 E_SEAL_LOCK_DUMMY, \
618 E_SEAL_LOCK_DUMMY, \
619 E_SEAL_LOCK_DUMMY
620
621 //-------------------------------------------------------------------------------------------------
622 // Local Structures
623 //-------------------------------------------------------------------------------------------------
624 const eSeal_IP NonPmIpTbl[SEAL_NONPM_TBL_IP_NUM] =
625 {
626 SEAL_NON_PM_GROUP0,
627 SEAL_NON_PM_GROUP1,
628 SEAL_NON_PM_GROUP2,
629 SEAL_NON_PM_GROUP3,
630 SEAL_NON_PM_GROUP4,
631 SEAL_NON_PM_GROUP5,
632 SEAL_NON_PM_GROUP6,
633 SEAL_NON_PM_GROUP7,
634 SEAL_NON_PM_GROUP8,
635 SEAL_NON_PM_GROUP9,
636 SEAL_NON_PM_GROUP10,
637 SEAL_NON_PM_GROUP11,
638 SEAL_NON_PM_GROUP12,
639 SEAL_NON_PM_GROUP13,
640 SEAL_NON_PM_GROUP14,
641 SEAL_NON_PM_GROUP15
642 };
643
644 const eSeal_IP PmIpTbl[SEAL_PM_TBL_IP_NUM] =
645 {
646 SEAL_PM_GROUP0,
647 SEAL_PM_GROUP1,
648 SEAL_PM_GROUP2,
649 SEAL_PM_GROUP3
650 };
651
652 const eSeal_ProcessorId ProcessorTbl[SEAL_TBL_PROCESSOR_NUM] =
653 {
654 SEAL_PROCESSOR_GROUP0
655 };
656
657 const eSeal_Lock LockTbl[SEAL_TBL_LOCK_NUM] =
658 {
659 SEAL_LOCK_GROUP0,
660 SEAL_LOCK_GROUP1,
661 SEAL_LOCK_GROUP2,
662 SEAL_LOCK_GROUP3,
663 SEAL_LOCK_GROUP4,
664 SEAL_LOCK_GROUP5,
665 SEAL_LOCK_GROUP6
666 };
667 //-------------------------------------------------------------------------------------------------
668 // Global Variables
669 //-------------------------------------------------------------------------------------------------
670
671 //-------------------------------------------------------------------------------------------------
672 // Local Variables
673 //-------------------------------------------------------------------------------------------------
674 static MS_U32 _gSEAL_NonPmMapBase = 0;
675 static MS_U32 _gSEAL_PmMapBase = 0;
676
677 static MS_U16 SEAL_SECURE0_Buffer[SEAL_BANK_RIU_NUM];
678 static MS_U16 SEAL_SECURE1_Buffer[SEAL_BANK_RIU_NUM];
679 static MS_U16 SEAL_TZPC_NONPM_Buffer[SEAL_BANK_RIU_NUM];
680 //-------------------------------------------------------------------------------------------------
681 // Debug Functions
682 //-------------------------------------------------------------------------------------------------
683
684 //-------------------------------------------------------------------------------------------------
685 // Local Functions
686 //-------------------------------------------------------------------------------------------------
687
688 ////////////////////////////////////////////////////////////////////////////////
689 /// @brief \b Function \b Name: HAL_SEAL_NonPmReadByte
690 /// @brief \b Function \b Description: read 1 Byte data
691 /// @param <IN> \b u32RegAddr: register address
692 /// @param <OUT> \b None :
693 /// @param <RET> \b MS_U8
694 /// @param <GLOBAL> \b None :
695 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmReadByte(MS_U32 u32RegAddr)696 MS_U8 HAL_SEAL_NonPmReadByte(MS_U32 u32RegAddr)
697 {
698 return ((volatile MS_U8*)(_gSEAL_NonPmMapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)];
699 }
700
701 ////////////////////////////////////////////////////////////////////////////////
702 /// @brief \b Function \b Name: HAL_SEAL_PmReadByte
703 /// @brief \b Function \b Description: read 1 Byte data
704 /// @param <IN> \b u32RegAddr: register address
705 /// @param <OUT> \b None :
706 /// @param <RET> \b MS_U8
707 /// @param <GLOBAL> \b None :
708 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_PmReadByte(MS_U32 u32RegAddr)709 MS_U8 HAL_SEAL_PmReadByte(MS_U32 u32RegAddr)
710 {
711 return ((volatile MS_U8*)(_gSEAL_PmMapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)];
712 }
713
714 ////////////////////////////////////////////////////////////////////////////////
715 /// @brief \b Function \b Name: HAL_SEAL_NonPmRead2Byte
716 /// @brief \b Function \b Description: read 2 Byte data
717 /// @param <IN> \b u32RegAddr: register address
718 /// @param <OUT> \b None :
719 /// @param <RET> \b MS_U16
720 /// @param <GLOBAL> \b None :
721 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmRead2Byte(MS_U32 u32RegAddr)722 MS_U16 HAL_SEAL_NonPmRead2Byte(MS_U32 u32RegAddr)
723 {
724 return ((volatile MS_U16*)(_gSEAL_NonPmMapBase))[u32RegAddr];
725 }
726
727 ////////////////////////////////////////////////////////////////////////////////
728 /// @brief \b Function \b Name: HAL_SEAL_PmRead2Byte
729 /// @brief \b Function \b Description: read 2 Byte data
730 /// @param <IN> \b u32RegAddr: register address
731 /// @param <OUT> \b None :
732 /// @param <RET> \b MS_U16
733 /// @param <GLOBAL> \b None :
734 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_PmRead2Byte(MS_U32 u32RegAddr)735 MS_U16 HAL_SEAL_PmRead2Byte(MS_U32 u32RegAddr)
736 {
737 return ((volatile MS_U16*)(_gSEAL_PmMapBase))[u32RegAddr];
738 }
739
740 ////////////////////////////////////////////////////////////////////////////////
741 /// @brief \b Function \b Name: HAL_SEAL_NonPmRead4Byte
742 /// @brief \b Function \b Description: read 4 Byte data
743 /// @param <IN> \b u32RegAddr: register address
744 /// @param <OUT> \b None :
745 /// @param <RET> \b MS_U32
746 /// @param <GLOBAL> \b None :
747 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmRead4Byte(MS_U32 u32RegAddr)748 MS_U32 HAL_SEAL_NonPmRead4Byte(MS_U32 u32RegAddr)
749 {
750 return (HAL_SEAL_NonPmRead2Byte(u32RegAddr) | HAL_SEAL_NonPmRead2Byte(u32RegAddr+2) << 16);
751 }
752
753 ////////////////////////////////////////////////////////////////////////////////
754 /// @brief \b Function \b Name: HAL_SEAL_NonPmRead6Byte
755 /// @brief \b Function \b Description: read 6 Byte data
756 /// @param <IN> \b u32RegAddr: register address
757 /// @param <OUT> \b None :
758 /// @param <RET> \b MS_U64
759 /// @param <GLOBAL> \b None :
760 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmRead6Byte(MS_U32 u32RegAddr)761 MS_U64 HAL_SEAL_NonPmRead6Byte(MS_U32 u32RegAddr)
762 {
763 MS_U64 u64HitAddr;
764
765 u64HitAddr = 0;
766 u64HitAddr |= (MS_U64)HAL_SEAL_NonPmRead2Byte(u32RegAddr);
767 u64HitAddr |= (MS_U64)HAL_SEAL_NonPmRead2Byte(u32RegAddr + 2) << 16;
768 u64HitAddr |= (MS_U64)(HAL_SEAL_NonPmRead2Byte(u32RegAddr + 4)) << 32;
769
770 return u64HitAddr;
771 }
772
773 ////////////////////////////////////////////////////////////////////////////////
774 /// @brief \b Function \b Name: HAL_SEAL_NonPmWriteByte
775 /// @brief \b Function \b Description: write 1 Byte data
776 /// @param <IN> \b u32RegAddr: register address
777 /// @param <IN> \b u8Val : 1 byte data
778 /// @param <OUT> \b None :
779 /// @param <RET> \b TRUE: Ok FALSE: Fail
780 /// @param <GLOBAL> \b None :
781 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmWriteByte(MS_U32 u32RegAddr,MS_U8 u8Val)782 MS_BOOL HAL_SEAL_NonPmWriteByte(MS_U32 u32RegAddr, MS_U8 u8Val)
783 {
784 if (!u32RegAddr)
785 {
786 HAL_SEAL_ERR("%s reg error!\n", __FUNCTION__);
787 return FALSE;
788 }
789
790 ((volatile MS_U8*)(_gSEAL_NonPmMapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)] = u8Val;
791 return TRUE;
792 }
793
794 ////////////////////////////////////////////////////////////////////////////////
795 /// @brief \b Function \b Name: HAL_SEAL_PmWriteByte
796 /// @brief \b Function \b Description: write 1 Byte data
797 /// @param <IN> \b u32RegAddr: register address
798 /// @param <IN> \b u8Val : 1 byte data
799 /// @param <OUT> \b None :
800 /// @param <RET> \b TRUE: Ok FALSE: Fail
801 /// @param <GLOBAL> \b None :
802 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_PmWriteByte(MS_U32 u32RegAddr,MS_U8 u8Val)803 MS_BOOL HAL_SEAL_PmWriteByte(MS_U32 u32RegAddr, MS_U8 u8Val)
804 {
805 if (!u32RegAddr)
806 {
807 HAL_SEAL_ERR("%s reg error!\n", __FUNCTION__);
808 return FALSE;
809 }
810
811 ((volatile MS_U8*)(_gSEAL_PmMapBase))[(u32RegAddr << 1) - (u32RegAddr & 1)] = u8Val;
812 return TRUE;
813 }
814
815 ////////////////////////////////////////////////////////////////////////////////
816 /// @brief \b Function \b Name: HAL_SEAL_NonPmWrite2Byte
817 /// @brief \b Function \b Description: write 2 Byte data
818 /// @param <IN> \b u32RegAddr: register address
819 /// @param <IN> \b u16Val : 2 byte data
820 /// @param <OUT> \b None :
821 /// @param <RET> \b TRUE: Ok FALSE: Fail
822 /// @param <GLOBAL> \b None :
823 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmWrite2Byte(MS_U32 u32RegAddr,MS_U16 u16Val)824 MS_BOOL HAL_SEAL_NonPmWrite2Byte(MS_U32 u32RegAddr, MS_U16 u16Val)
825 {
826 if (!u32RegAddr)
827 {
828 HAL_SEAL_ERR("%s reg error!\n", __FUNCTION__);
829 return FALSE;
830 }
831
832 ((volatile MS_U16*)(_gSEAL_NonPmMapBase))[u32RegAddr] = u16Val;
833 return TRUE;
834 }
835
836 ////////////////////////////////////////////////////////////////////////////////
837 /// @brief \b Function \b Name: HAL_SEAL_PmWrite2Byte
838 /// @brief \b Function \b Description: write 2 Byte data
839 /// @param <IN> \b u32RegAddr: register address
840 /// @param <IN> \b u16Val : 2 byte data
841 /// @param <OUT> \b None :
842 /// @param <RET> \b TRUE: Ok FALSE: Fail
843 /// @param <GLOBAL> \b None :
844 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_PmWrite2Byte(MS_U32 u32RegAddr,MS_U16 u16Val)845 MS_BOOL HAL_SEAL_PmWrite2Byte(MS_U32 u32RegAddr, MS_U16 u16Val)
846 {
847 if (!u32RegAddr)
848 {
849 HAL_SEAL_ERR("%s reg error!\n", __FUNCTION__);
850 return FALSE;
851 }
852
853 ((volatile MS_U16*)(_gSEAL_PmMapBase))[u32RegAddr] = u16Val;
854 return TRUE;
855 }
856
857 ////////////////////////////////////////////////////////////////////////////////
858 /// @brief \b Function \b Name: HAL_SEAL_NonPmWrite4Byte
859 /// @brief \b Function \b Description: write 4 Byte data
860 /// @param <IN> \b u32RegAddr: register address
861 /// @param <IN> \b u32Val : 4 byte data
862 /// @param <OUT> \b None :
863 /// @param <RET> \b TRUE: Ok FALSE: Fail
864 /// @param <GLOBAL> \b None :
865 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmWrite4Byte(MS_U32 u32RegAddr,MS_U32 u32Val)866 MS_BOOL HAL_SEAL_NonPmWrite4Byte(MS_U32 u32RegAddr, MS_U32 u32Val)
867 {
868 if (!u32RegAddr)
869 {
870 HAL_SEAL_ERR("%s reg error!\n", __FUNCTION__);
871 return FALSE;
872 }
873
874 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u32Val & 0x0000FFFF);
875 HAL_SEAL_NonPmWrite2Byte(u32RegAddr+2, u32Val >> 16);
876 return TRUE;
877 }
878
879 ////////////////////////////////////////////////////////////////////////////////
880 /// @brief \b Function \b Name: HAL_SEAL_NonPmWrite6Byte
881 /// @brief \b Function \b Description: write 6 Byte data
882 /// @param <IN> \b u32RegAddr: register address
883 /// @param <IN> \b u64Val : 4 byte data
884 /// @param <OUT> \b None :
885 /// @param <RET> \b TRUE: Ok FALSE: Fail
886 /// @param <GLOBAL> \b None :
887 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmWrite6Byte(MS_U32 u32RegAddr,MS_U64 u64Val)888 MS_BOOL HAL_SEAL_NonPmWrite6Byte(MS_U32 u32RegAddr, MS_U64 u64Val)
889 {
890 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u64Val & 0xFFFF);
891 HAL_SEAL_NonPmWrite2Byte(u32RegAddr + 2,(u64Val >> 16) & 0xFFFF);
892 HAL_SEAL_NonPmWrite2Byte(u32RegAddr + 4,(u64Val >> 32) & 0xFFFF);
893 return TRUE;
894 }
895
896 ////////////////////////////////////////////////////////////////////////////////
897 /// @brief \b Function \b Name: HAL_SEAL_NonPmWriteRegBit
898 /// @brief \b Function \b Description: set or reset one bit in 1-byte data
899 /// @param <IN> \b u32RegAddr: register address
900 /// @param <IN> \b u8Mask: 1-byte mask
901 /// @param <IN> \b bEnabl: decide if set or reset bits
902 /// @param <RET> \b TRUE: Ok FALSE: Fail
903 /// @param <GLOBAL> \b None :
904 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmWriteRegBit(MS_U32 u32RegAddr,MS_U8 u8Mask,MS_BOOL bEnable)905 MS_BOOL HAL_SEAL_NonPmWriteRegBit(MS_U32 u32RegAddr, MS_U8 u8Mask, MS_BOOL bEnable)
906 {
907 MS_U8 u8Val = HAL_SEAL_NonPmReadByte(u32RegAddr);
908 if (!u32RegAddr)
909 {
910 HAL_SEAL_ERR("%s reg error!\n", __FUNCTION__);
911 return FALSE;
912 }
913
914 u8Val = HAL_SEAL_NonPmReadByte(u32RegAddr);
915 u8Val = (bEnable) ? (u8Val | u8Mask) : (u8Val & ~u8Mask);
916 HAL_SEAL_NonPmWriteByte(u32RegAddr, u8Val);
917 return TRUE;
918 }
919
920 ////////////////////////////////////////////////////////////////////////////////
921 /// @brief \b Function \b Name: HAL_SEAL_NonPmWrite2BytesBit
922 /// @brief \b Function \b Description: set or reset one bit in 2-byte data
923 /// @param <IN> \b u32RegAddr: register address
924 /// @param <IN> \b u8Mask: 2-byte mask
925 /// @param <IN> \b bEnabl: decide if set or reset bits
926 /// @param <RET> \b TRUE: Ok FALSE: Fail
927 /// @param <GLOBAL> \b None :
928 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_NonPmWrite2BytesBit(MS_U32 u32RegOffset,MS_BOOL bEnable,MS_U16 u16Mask)929 void HAL_SEAL_NonPmWrite2BytesBit(MS_U32 u32RegOffset, MS_BOOL bEnable, MS_U16 u16Mask)
930 {
931 MS_U16 val = HAL_SEAL_NonPmRead2Byte(u32RegOffset);
932 val = (bEnable) ? (val | u16Mask) : (val & ~u16Mask);
933 HAL_SEAL_NonPmWrite2Byte(u32RegOffset, val);
934 }
935
936 ////////////////////////////////////////////////////////////////////////////////
937 /// @brief \b Function \b Name: HAL_SEAL_GetNonPmIpIdx
938 /// @brief \b Function \b Description: Get the Non-PM IP index with respect to HW wired
939 /// @param <IN> \b u32RegAddr: Non-PM IP index with respect to SW enum
940 /// @param <OUT> \b None :
941 /// @param <RET> \b MS_S32: Non-PM IP index with respect to HW wired
942 /// @param <GLOBAL> \b None :
943 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_GetNonPmIpIdx(eSeal_IP eNonPmIP)944 MS_S32 HAL_SEAL_GetNonPmIpIdx(eSeal_IP eNonPmIP)
945 {
946 MS_S32 s32HwIdx;
947
948 for (s32HwIdx = 0; s32HwIdx < SEAL_NONPM_TBL_IP_NUM; s32HwIdx++)
949 {
950 if(eNonPmIP == NonPmIpTbl[s32HwIdx])
951 {
952 return s32HwIdx;
953 }
954 }
955
956 return (-1);
957 }
958
959 ////////////////////////////////////////////////////////////////////////////////
960 /// @brief \b Function \b Name: HAL_SEAL_GetPmIpIdx
961 /// @brief \b Function \b Description: Get the PM IP index with respect to HW wired
962 /// @param <IN> \b u32RegAddr: PM IP index with respect to SW enum
963 /// @param <OUT> \b None :
964 /// @param <RET> \b MS_S32: PM IP index with respect to HW wired
965 /// @param <GLOBAL> \b None :
966 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_GetPmIpIdx(eSeal_IP ePmIP)967 MS_S32 HAL_SEAL_GetPmIpIdx(eSeal_IP ePmIP)
968 {
969 MS_S32 s32HwIdx;
970
971 for (s32HwIdx = 0; s32HwIdx < SEAL_PM_TBL_IP_NUM; s32HwIdx++)
972 {
973 if(ePmIP == PmIpTbl[s32HwIdx])
974 {
975 return s32HwIdx;
976 }
977 }
978
979 return (-1);
980 }
981
982 ////////////////////////////////////////////////////////////////////////////////
983 /// @brief \b Function \b Name: HAL_SEAL_GetProcessorIdx
984 /// @brief \b Function \b Description: Get the processor index with respect to HW wired
985 /// @param <IN> \b u32RegAddr: Processor index with respect to SW enum
986 /// @param <OUT> \b None :
987 /// @param <RET> \b MS_S32: Processor index with respect to HW wired
988 /// @param <GLOBAL> \b None :
989 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_GetProcessorIdx(eSeal_ProcessorId eProcessorId)990 MS_S32 HAL_SEAL_GetProcessorIdx(eSeal_ProcessorId eProcessorId)
991 {
992 MS_S32 s32HwIdx;
993
994 for (s32HwIdx = 0; s32HwIdx < SEAL_TBL_PROCESSOR_NUM; s32HwIdx++)
995 {
996 if(eProcessorId == ProcessorTbl[s32HwIdx])
997 {
998 return s32HwIdx;
999 }
1000 }
1001
1002 return (-1);
1003 }
1004
1005 ////////////////////////////////////////////////////////////////////////////////
1006 /// @brief \b Function \b Name: HAL_SEAL_GetLockIdx
1007 /// @brief \b Function \b Description: Get the lock index with respect to HW wired
1008 /// @param <IN> \b u32RegAddr: Lock index with respect to SW enum
1009 /// @param <OUT> \b None :
1010 /// @param <RET> \b MS_S32: Lock index with respect to HW wired
1011 /// @param <GLOBAL> \b None :
1012 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_GetLockIdx(eSeal_Lock eLockId)1013 MS_S32 HAL_SEAL_GetLockIdx(eSeal_Lock eLockId)
1014 {
1015 MS_S32 s32HwIdx;
1016
1017 for (s32HwIdx = 0; s32HwIdx < SEAL_TBL_LOCK_NUM; s32HwIdx++)
1018 {
1019 if(eLockId == LockTbl[s32HwIdx])
1020 {
1021 return s32HwIdx;
1022 }
1023 }
1024
1025 return (-1);
1026 }
1027
1028 //-------------------------------------------------------------------------------------------------
1029 // Type and Structure Declaration
1030 //-------------------------------------------------------------------------------------------------
1031
1032 //-------------------------------------------------------------------------------------------------
1033 // Global Functions
1034 //-------------------------------------------------------------------------------------------------
1035
1036 ////////////////////////////////////////////////////////////////////////////////
1037 /// @brief \b Function \b Name: HAL_SEAL_SetIOMapBase
1038 /// @brief \b Function \b Description: set io-base
1039 /// @param <IN> \b u32NonPmBaseAddr: Non-PM io-base address
1040 /// @param <IN> \b u32PmBaseAddr: PM io-base address
1041 /// @param <OUT> \b None :
1042 /// @param <RET> \b MS_U8
1043 /// @param <GLOBAL> \b None :
1044 ////////////////////////////////////////////////////////////////////////////////
HAL_SEAL_SetIOMapBase(MS_U32 u32NonPmBaseAddr,MS_U32 u32PmBaseAddr)1045 void HAL_SEAL_SetIOMapBase(MS_U32 u32NonPmBaseAddr, MS_U32 u32PmBaseAddr)
1046 {
1047 MS_U32 u32RegAddr;
1048 MS_U8 u8Val;
1049
1050 _gSEAL_NonPmMapBase = u32NonPmBaseAddr;
1051 _gSEAL_PmMapBase = u32PmBaseAddr;
1052 HAL_SEAL_DBG(printf("SEAL _gSEAL_NonPmMapBase= %x\n", _gSEAL_NonPmMapBase));
1053 HAL_SEAL_DBG(printf("SEAL _gSEAL_PmMapBase= %x\n", _gSEAL_PmMapBase));
1054
1055 // Force RIU bank be controled by TZPC
1056 u32RegAddr = REG_TZPC_PROTECT_CTL;
1057 u8Val = HAL_SEAL_NonPmReadByte(u32RegAddr);
1058 u8Val = u8Val | (1 << 2);
1059 HAL_SEAL_NonPmWriteByte(u32RegAddr, u8Val);
1060 }
1061
1062 ////////////////////////////////////////////////////////////////////////////////
1063 /// @brief \b Function \b Name: HAL_Seal_SecureRangeSet
1064 /// @brief \b Function \b Description: set the secure range on MIU
1065 /// @param <IN> \b u8SecureRangeId : Secure range ID
1066 /// @param <IN> \b u64StartAddr : Start address of secure range
1067 /// @param <IN> \b u64EndAddr : End address of secure range
1068 /// @param <IN> \b u32Attribute : Attribute of secure range
1069 /// @param <OUT> \b OUT :
1070 /// @param <RET> \b RET
1071 /// @param <GLOBAL> \b GLOBAL :
1072 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureRangeSet(MS_U8 u8SecureRangeId,MS_U64 u64StartAddr,MS_U64 u64EndAddr,MS_U32 u32Attribute)1073 MS_BOOL HAL_Seal_SecureRangeSet(
1074 MS_U8 u8SecureRangeId,
1075 MS_U64 u64StartAddr,
1076 MS_U64 u64EndAddr,
1077 MS_U32 u32Attribute
1078 )
1079 {
1080 MS_U32 u32RegStartAddr = 0;
1081 MS_U32 u32RegEndAddr = 0;
1082 MS_U32 u32RegAttribute = 0;
1083 MS_U32 u32RegDetEn = 0;
1084 MS_U16 u16Val = 0;
1085 MS_U32 u32RangeOffset = 0x08 * u8SecureRangeId;
1086
1087 if (u8SecureRangeId >= E_HAL_SEAL_SECURE_RANGE_NUM)
1088 {
1089 return FALSE;
1090 }
1091
1092 if(u64StartAddr < HAL_MIU1_BASE)
1093 {
1094 u32RegDetEn = REG_SECURE0_DETECT_ENABLE;
1095 u32RegStartAddr = REG_SECURE0_RANGE0_START_ADDR + u32RangeOffset;
1096 u32RegEndAddr = REG_SECURE0_RANGE0_END_ADDR + u32RangeOffset;
1097 u32RegAttribute = REG_SECURE0_RANGE0_ATTRIBUTE + u32RangeOffset;
1098 }
1099 else
1100 {
1101 u64StartAddr -= HAL_MIU1_BASE;
1102 u64EndAddr -= HAL_MIU1_BASE;
1103
1104 u32RegDetEn = REG_SECURE1_DETECT_ENABLE;
1105 u32RegStartAddr = REG_SECURE1_RANGE0_START_ADDR + u32RangeOffset;
1106 u32RegEndAddr = REG_SECURE1_RANGE0_END_ADDR + u32RangeOffset;
1107 u32RegAttribute = REG_SECURE1_RANGE0_ATTRIBUTE + u32RangeOffset;
1108 }
1109
1110 // range value is 4k-shifted
1111 u64StartAddr = u64StartAddr >> 12;
1112 u64EndAddr = u64EndAddr >> 12;
1113
1114 // disable secure range detection
1115 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegDetEn);
1116 u16Val &= ~(1 << u8SecureRangeId);
1117 HAL_SEAL_NonPmWrite2Byte(u32RegDetEn, u16Val);
1118
1119 // Reset attribute
1120 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAttribute);
1121 u16Val |= 0x0F00;
1122 HAL_SEAL_NonPmWrite2Byte(u32RegAttribute, u16Val);
1123
1124 // Set start address
1125 HAL_SEAL_NonPmWrite4Byte(u32RegStartAddr, u64StartAddr);
1126
1127 // Set end address
1128 HAL_SEAL_NonPmWrite4Byte(u32RegEndAddr, u64EndAddr);
1129
1130 // Trigger addr change
1131 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAttribute);
1132 u16Val |= SECURE_RANGE_ADDR_DYN_CH;
1133 HAL_SEAL_NonPmWrite2Byte(u32RegAttribute, u16Val);
1134
1135 // Set attribute
1136 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAttribute);
1137 u16Val &= ~(0x0F00);
1138 u16Val |= ((u32Attribute&0x0F)<<8);
1139 HAL_SEAL_NonPmWrite2Byte(u32RegAttribute, u16Val);
1140
1141 // Enable secure range detection
1142 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegDetEn);
1143 u16Val |= (1 << u8SecureRangeId);
1144 HAL_SEAL_NonPmWrite2Byte(u32RegDetEn, u16Val);
1145
1146 return TRUE;
1147 }
1148
1149 ////////////////////////////////////////////////////////////////////////////////
1150 /// @brief \b Function \b Name: HAL_Seal_SecureRangeQuery
1151 /// @brief \b Function \b Description: Query the attribute of secure range
1152 /// @param <IN> \b u8SecureRangeId : Secure range ID
1153 /// @param <OUT> \b pAttribute : Attribute of secure range
1154 /// @param <OUT> \b pStartAddr : Start address of secure range
1155 /// @param <OUT> \b pEndAddr : End address of secure range
1156 /// @param <RET> \b RET
1157 /// @param <GLOBAL> \b GLOBAL :
1158 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureRangeQuery(MS_U8 u8MiuDev,MS_U8 u8SecureRangeId,MS_U32 * pAttribute,MS_U64 * pStartAddr,MS_U64 * pEndAddr)1159 MS_BOOL HAL_Seal_SecureRangeQuery(
1160 MS_U8 u8MiuDev,
1161 MS_U8 u8SecureRangeId,
1162 MS_U32 *pAttribute,
1163 MS_U64 *pStartAddr,
1164 MS_U64 *pEndAddr)
1165 {
1166 MS_U32 u32RegStartAddr = 0;
1167 MS_U32 u32RegEndAddr = 0;
1168 MS_U32 u32RegAttribute = 0;
1169 MS_U32 u32RangeOffset = 0x08 * u8SecureRangeId;
1170
1171 if (u8SecureRangeId >= E_HAL_SEAL_SECURE_RANGE_NUM)
1172 {
1173 return FALSE;
1174 }
1175
1176 if(u8MiuDev == E_HAL_MIU_DEV0)
1177 {
1178 u32RegStartAddr = REG_SECURE0_RANGE0_START_ADDR + u32RangeOffset;
1179 u32RegEndAddr = REG_SECURE0_RANGE0_END_ADDR + u32RangeOffset;
1180 u32RegAttribute = REG_SECURE0_RANGE0_ATTRIBUTE + u32RangeOffset;
1181 }
1182 else
1183 {
1184 u32RegStartAddr = REG_SECURE1_RANGE0_START_ADDR + u32RangeOffset;
1185 u32RegEndAddr = REG_SECURE1_RANGE0_END_ADDR + u32RangeOffset;
1186 u32RegAttribute = REG_SECURE1_RANGE0_ATTRIBUTE + u32RangeOffset;
1187 }
1188
1189 // Get secure range attribute
1190 *pAttribute = (MS_U32)((HAL_SEAL_NonPmRead2Byte(u32RegAttribute)& 0xF00))>>8;
1191
1192 // Get start address
1193 *pStartAddr = (HAL_SEAL_NonPmRead4Byte(u32RegStartAddr) & 0x0FFFFF) << 12; // 20-bit value, 4kb shifted
1194
1195 // Get end address
1196 *pEndAddr = (HAL_SEAL_NonPmRead4Byte(u32RegEndAddr) & 0x0FFFFF) << 12;
1197
1198 return TRUE;
1199 }
1200
1201 ////////////////////////////////////////////////////////////////////////////////
1202 /// @brief \b Function \b Name: HAL_Seal_IMI_RangeSet
1203 /// @brief \b Function \b Description: set the secure range on internel memory interface
1204 /// @param <IN> \b u32StartAddr : Start address of secure range on IMI
1205 /// @param <IN> \b u32EndAddr : End address of secure range on IMI
1206 /// @param <IN> \b bEnable : Enable/Disable secure range on IMI
1207 /// @param <OUT> \b OUT :
1208 /// @param <RET> \b RET
1209 /// @param <GLOBAL> \b GLOBAL :
1210 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_IMI_RangeSet(MS_U32 u32StartAddr,MS_U32 u32EndAddr,MS_BOOL bEnable)1211 MS_BOOL HAL_Seal_IMI_RangeSet(MS_U32 u32StartAddr, MS_U32 u32EndAddr, MS_BOOL bEnable)
1212 {
1213 MS_U32 u32RegStartAddr = 0;
1214 MS_U32 u32RegEndAddr = 0;
1215
1216 u32RegStartAddr = REG_IMI_RANGE_START_ADDR;
1217 u32RegEndAddr = REG_IMI_RANGE_END_ADDR;
1218
1219 if(bEnable == 1)
1220 {
1221 // Set start address
1222 HAL_SEAL_NonPmWrite4Byte(u32RegStartAddr, u32StartAddr);
1223
1224 // Set end address
1225 HAL_SEAL_NonPmWrite4Byte(u32RegEndAddr, u32EndAddr);
1226 }
1227 else
1228 {
1229 // Reset start address
1230 HAL_SEAL_NonPmWrite4Byte(u32RegStartAddr, 0x0);
1231
1232 // Reset end address
1233 HAL_SEAL_NonPmWrite4Byte(u32RegEndAddr,0x0);
1234 }
1235
1236 return TRUE;
1237 }
1238
1239 ////////////////////////////////////////////////////////////////////////////////
1240 /// @brief \b Function \b Name: HAL_Seal_GetMiuHitFlag
1241 /// @brief \b Function \b Description: Get the information about hitted flag on MIU
1242 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1243 /// @param <OUT> \b None:
1244 /// @param <RET> \b MS_BOOL: Hitted flag
1245 /// @param <GLOBAL> \b None :
1246 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_GetMiuHitFlag(MS_U8 u8MiuDev)1247 MS_BOOL HAL_Seal_GetMiuHitFlag(MS_U8 u8MiuDev)
1248 {
1249 MS_U32 u32RegLogAddr;
1250 MS_U16 u16Val;
1251
1252 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_STATUS : REG_SECURE0_HITTED_STATUS;
1253
1254 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegLogAddr);
1255
1256 if(REG_SECURE_HITTED_FALG & u16Val)
1257 {
1258 return TRUE;
1259 }
1260 else
1261 {
1262 return FALSE;
1263 }
1264 }
1265
1266 ////////////////////////////////////////////////////////////////////////////////
1267 /// @brief \b Function \b Name: HAL_Seal_GetHitRangeID
1268 /// @brief \b Function \b Description: Get the information about the ID of hitted secure range on MIU
1269 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1270 /// @param <OUT> \b None:
1271 /// @param <RET> \b MS_U8: ID of hitted secure range
1272 /// @param <GLOBAL> \b None :
1273 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_GetMiuHitRangeID(MS_U8 u8MiuDev)1274 MS_U8 HAL_Seal_GetMiuHitRangeID(MS_U8 u8MiuDev)
1275 {
1276 MS_U32 u32RegLogAddr;
1277 MS_U16 u16Val;
1278 MS_U16 u8ret;
1279
1280 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_RANGE_ID : REG_SECURE0_HITTED_RANGE_ID;
1281
1282 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegLogAddr);
1283
1284 u8ret =(MS_U8)GET_HIT_RANGE_ID(u16Val);
1285
1286 return u8ret;
1287 }
1288
1289 ////////////////////////////////////////////////////////////////////////////////
1290 /// @brief \b Function \b Name: HAL_Seal_GetHitClientID
1291 /// @brief \b Function \b Description: Get the information about the ID of hittd MIU client ID on MIU
1292 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1293 /// @param <OUT> \b None:
1294 /// @param <RET> \b MS_U8: hittd MIU client ID
1295 /// @param <GLOBAL> \b None :
1296 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_GetMiuHitClientID(MS_U8 u8MiuDev)1297 MS_U8 HAL_Seal_GetMiuHitClientID(MS_U8 u8MiuDev)
1298 {
1299 MS_U32 u32RegLogAddr;
1300 MS_U16 u16Val;
1301 MS_U16 u8ret;
1302
1303 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_STATUS : REG_SECURE0_HITTED_STATUS;
1304
1305 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegLogAddr);
1306 u8ret =(MS_U8)GET_HIT_CLIENT_ID(u16Val);
1307
1308 return u8ret;
1309 }
1310
1311 ////////////////////////////////////////////////////////////////////////////////
1312 /// @brief \b Function \b Name: HAL_Seal_GetSecureFlag
1313 /// @brief \b Function \b Description: Get the information about the hitted client on MIU be secure or not
1314 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1315 /// @param <OUT> \b None:
1316 /// @param <RET> \b MS_BOOL: Secure flag
1317 /// @param <GLOBAL> \b None :
1318 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_GetMiuSecureFlag(MS_U8 u8MiuDev)1319 MS_BOOL HAL_Seal_GetMiuSecureFlag(MS_U8 u8MiuDev)
1320 {
1321 MS_U32 u32RegLogAddr;
1322 MS_U16 u16Val;
1323
1324 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_STATUS : REG_SECURE0_HITTED_STATUS;
1325
1326 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegLogAddr);
1327
1328 if(REG_SECURE_HITTED_IS_NONSECURE & u16Val)
1329 {
1330 return FALSE;
1331 }
1332 else
1333 {
1334 return TRUE;
1335 }
1336 }
1337
1338 ////////////////////////////////////////////////////////////////////////////////
1339 /// @brief \b Function \b Name: HAL_Seal_GetWriteFlag
1340 /// @brief \b Function \b Description: Get the information about the violation on MIU be write or read access
1341 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1342 /// @param <OUT> \b None:
1343 /// @param <RET> \b MS_BOOL: Write flag
1344 /// @param <GLOBAL> \b None :
1345 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_GetMiuWriteFlag(MS_U8 u8MiuDev)1346 MS_BOOL HAL_Seal_GetMiuWriteFlag(MS_U8 u8MiuDev)
1347 {
1348 MS_U32 u32RegLogAddr;
1349 MS_U16 u16Val;
1350
1351 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_STATUS : REG_SECURE0_HITTED_STATUS;
1352
1353 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegLogAddr);
1354
1355 if(REG_SECURE_HITTED_IS_WRITE & u16Val)
1356 {
1357 return TRUE;
1358 }
1359 else
1360 {
1361 return FALSE;
1362 }
1363 }
1364
1365 ////////////////////////////////////////////////////////////////////////////////
1366 /// @brief \b Function \b Name: HAL_Seal_GetHitAddr
1367 /// @brief \b Function \b Description: Get the information about the hitted address on MIU
1368 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1369 /// @param <OUT> \b None:
1370 /// @param <RET> \b MS_U32: Hitted address
1371 /// @param <GLOBAL> \b None :
1372 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_GetMiuHitAddr(MS_U8 u8MiuDev)1373 MS_U64 HAL_Seal_GetMiuHitAddr(MS_U8 u8MiuDev)
1374 {
1375 MS_U32 u32RegAddr;
1376 MS_U64 u64Val;
1377
1378 u32RegAddr = (u8MiuDev) ? REG_SECURE1_HITTED_ADDR : REG_SECURE0_HITTED_ADDR;
1379 u64Val = HAL_SEAL_NonPmRead4Byte(u32RegAddr);
1380
1381 return u64Val;
1382 }
1383
1384 ////////////////////////////////////////////////////////////////////////////////
1385 /// @brief \b Function \b Name: HAL_Seal_ClearMiuHitLog
1386 /// @brief \b Function \b Description: Clear the hitted log on MIU
1387 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1388 /// @param <OUT> \b None:
1389 /// @param <RET> \b RET:
1390 /// @param <GLOBAL> \b None :
1391 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_ClearMiuHitLog(MS_U8 u8MiuDev)1392 MS_BOOL HAL_Seal_ClearMiuHitLog(MS_U8 u8MiuDev)
1393 {
1394 MS_U32 u32RegLogAddr;
1395
1396 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_STATUS : REG_SECURE0_HITTED_STATUS;
1397
1398 HAL_SEAL_NonPmWrite2BytesBit(u32RegLogAddr, TRUE, REG_SECURE_HITTED_LOG_CLR);
1399 HAL_SEAL_NonPmWrite2BytesBit(u32RegLogAddr, FALSE, REG_SECURE_HITTED_LOG_CLR);
1400 return TRUE;
1401 }
1402
1403 ////////////////////////////////////////////////////////////////////////////////
1404 /// @brief \b Function \b Name: HAL_Seal_SecureRangeLock
1405 /// @brief \b Function \b Description: One-way setting to lock the specific secure range
1406 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1407 /// @param <IN> \b u8SecureRangeId: Secure range ID
1408 /// @param <OUT> \b None:
1409 /// @param <RET> \b RET
1410 /// @param <GLOBAL> \b None :
1411 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureRangeLock(MS_U8 u8MiuDev,MS_U8 u8SecureRangeId)1412 MS_BOOL HAL_Seal_SecureRangeLock(MS_U8 u8MiuDev, MS_U8 u8SecureRangeId)
1413 {
1414 MS_U32 u32RegAddr;
1415 MS_U16 u16Val;
1416
1417 if (u8SecureRangeId >= E_HAL_SEAL_SECURE_RANGE_NUM)
1418 {
1419 return FALSE;
1420 }
1421
1422 u32RegAddr = (u8MiuDev) ? REG_SECURE1_LOCK : REG_SECURE0_LOCK;
1423 u16Val = HAL_SEAL_NonPmReadByte(u32RegAddr);
1424 u16Val = u16Val | (1 << u8SecureRangeId);
1425 HAL_SEAL_NonPmWriteByte(u32RegAddr, u16Val);
1426
1427 return TRUE;
1428 }
1429
1430 ////////////////////////////////////////////////////////////////////////////////
1431 /// @brief \b Function \b Name: HAL_Seal_SecureProcessorSet
1432 /// @brief \b Function \b Description: Define the specific processor be secure or not
1433 /// @param <IN> \b u8ProcessorId: Processor ID
1434 /// @param <IN> \b bSecure: 1: non-secure 0:secure
1435 /// @param <OUT> \b None:
1436 /// @param <RET> \b RET
1437 /// @param <GLOBAL> \b None :
1438 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_NonSecureProcessorSet(MS_U8 u8ProcessorId,MS_BOOL bNonSecure)1439 MS_BOOL HAL_Seal_NonSecureProcessorSet(MS_U8 u8ProcessorId, MS_BOOL bNonSecure)
1440 {
1441 MS_U32 u32RegAddr;
1442 MS_U16 u16Val;
1443 MS_S32 s32HwIdx;
1444
1445 s32HwIdx = HAL_SEAL_GetProcessorIdx(u8ProcessorId);
1446
1447 if(s32HwIdx == -1)
1448 {
1449 HAL_SEAL_ERR("Processor ID:%d doesn't exist !\n", u8ProcessorId);
1450 return FALSE;
1451 }
1452
1453 // special case for HEMCU
1454 if(u8ProcessorId == E_SEAL_HEMCU)
1455 {
1456 if(bNonSecure)
1457 HAL_SEAL_NonPmWriteRegBit(REG_TZPC_NONSECURE_HEMCU, BIT3, ENABLE);
1458 else
1459 HAL_SEAL_NonPmWriteRegBit(REG_TZPC_NONSECURE_HEMCU, BIT3, DISABLE);
1460
1461 return TRUE;
1462 }
1463
1464 u32RegAddr = REG_TZPC_NONSECURE_PROCESSOR;
1465 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1466
1467 if(bNonSecure)
1468 {
1469 u16Val = u16Val | (1 << (s32HwIdx * 2));
1470 }
1471 else
1472 {
1473 u16Val = u16Val & ~(1 << (s32HwIdx * 2));
1474 }
1475
1476 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1477
1478 return TRUE;
1479 }
1480
1481 ////////////////////////////////////////////////////////////////////////////////
1482 /// @brief \b Function \b Name: HAL_Seal_SecureProcessorQuery
1483 /// @brief \b Function \b Description: Query the specific processor be secure or not
1484 /// @param <IN> \b u8ProcessorId: Processor ID
1485 /// @param <OUT> \b pSecure: 1: non-secure 0:secure
1486 /// @param <RET> \b RET
1487 /// @param <GLOBAL> \b None :
1488 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_NonSecureProcessorQuery(MS_U8 u8ProcessorId,MS_BOOL * pNonSecure)1489 MS_BOOL HAL_Seal_NonSecureProcessorQuery(MS_U8 u8ProcessorId, MS_BOOL *pNonSecure)
1490 {
1491 MS_U32 u32RegAddr;
1492 MS_U16 u16Val;
1493 MS_U16 s32HwIdx;
1494
1495 s32HwIdx = HAL_SEAL_GetProcessorIdx(u8ProcessorId);
1496
1497 if(s32HwIdx == -1)
1498 {
1499 HAL_SEAL_ERR("Processor ID:%d doesn't exist !\n", u8ProcessorId);
1500 return FALSE;
1501 }
1502
1503 // special case for HEMCU
1504 if(u8ProcessorId == E_SEAL_HEMCU)
1505 {
1506 u32RegAddr = REG_TZPC_NONSECURE_HEMCU;
1507 u16Val = (MS_U8)HAL_SEAL_NonPmReadByte(u32RegAddr);
1508
1509 if(u16Val & BIT3)
1510 {
1511 *pNonSecure = 1;
1512 }
1513 else
1514 {
1515 *pNonSecure = 0;
1516 }
1517 return TRUE;
1518 }
1519
1520 u32RegAddr = REG_TZPC_NONSECURE_PROCESSOR;
1521 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1522
1523 if(u16Val & (1 << (s32HwIdx * 2)))
1524 {
1525 *pNonSecure = 1;
1526 }
1527 else
1528 {
1529 *pNonSecure = 0;
1530 }
1531
1532 return TRUE;
1533 }
1534
1535 ////////////////////////////////////////////////////////////////////////////////
1536 /// @brief \b Function \b Name: HAL_Seal_SecureSlaveSet
1537 /// @brief \b Function \b Description: Define the specific slave IP be secure or not
1538 /// @param <IN> \b u32SlaveId: Slave ID
1539 /// @param <IN> \b bSecure: 0: non-secure 1:secure
1540 /// @param <OUT> \b None:
1541 /// @param <RET> \b RET
1542 /// @param <GLOBAL> \b None :
1543 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureSlaveSet(MS_U32 u32SlaveId,MS_BOOL bSecure)1544 MS_BOOL HAL_Seal_SecureSlaveSet(MS_U32 u32SlaveId, MS_BOOL bSecure)
1545 {
1546 MS_U32 u32RegAddr;
1547 MS_U16 u16Val;
1548 MS_S32 s32HwIdx;
1549 MS_U8 u8GroupId;
1550 MS_U8 u8ClientId;
1551 MS_BOOL bIsPm;
1552
1553 bIsPm = 0;
1554 s32HwIdx = HAL_SEAL_GetNonPmIpIdx(u32SlaveId);
1555
1556 //Slave ID not in Non-PM group, check if u32SlaveId in PM group
1557 if(s32HwIdx == -1)
1558 {
1559 s32HwIdx = HAL_SEAL_GetPmIpIdx(u32SlaveId);
1560 bIsPm = 1;
1561
1562 //Slave ID not in Non-PM nor PM group
1563 if(s32HwIdx == -1)
1564 {
1565 HAL_SEAL_ERR("Slave ID:%ld doesn't exist !\n", u32SlaveId);
1566 return FALSE;
1567 }
1568 }
1569
1570 if(bIsPm == 0)
1571 {
1572 u8GroupId = (MS_U8)(s32HwIdx / SEAL_NONPM_GROUP_IP_NUM);
1573 u8ClientId = (MS_U8)(s32HwIdx % SEAL_NONPM_GROUP_IP_NUM);
1574 u32RegAddr = (MS_U32)(REG_TZPC_NONPM_SECURE_SLAVE + (u8GroupId * 2));
1575
1576 if(bSecure == 1)
1577 {
1578 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1579 u16Val = u16Val & (~(1 << u8ClientId));
1580 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1581 }
1582 else
1583 {
1584 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1585 u16Val = u16Val | (1 << u8ClientId);
1586 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1587 }
1588 }
1589 else
1590 {
1591 u8GroupId = (MS_U8)(s32HwIdx / SEAL_PM_GROUP_IP_NUM);
1592 u8ClientId = (MS_U8)(s32HwIdx % SEAL_PM_GROUP_IP_NUM);
1593 u32RegAddr = (MS_U32)(REG_TZPC_PM_SECURE_SLAVE + (u8GroupId * 2));
1594
1595 if(bSecure == 1)
1596 {
1597 u16Val = HAL_SEAL_PmRead2Byte(u32RegAddr);
1598 u16Val = u16Val & (~(1 << u8ClientId));
1599 HAL_SEAL_PmWrite2Byte(u32RegAddr, u16Val);
1600 }
1601 else
1602 {
1603 u16Val = HAL_SEAL_PmRead2Byte(u32RegAddr);
1604 u16Val = u16Val | (1 << u8ClientId);
1605 HAL_SEAL_PmWrite2Byte(u32RegAddr, u16Val);
1606 }
1607 }
1608 return TRUE;
1609 }
1610
1611 ////////////////////////////////////////////////////////////////////////////////
1612 /// @brief \b Function \b Name: HAL_Seal_SecureSlaveQuery
1613 /// @brief \b Function \b Description: Query the specific slave IP be secure or not
1614 /// @param <IN> \b u32SlaveId: Slave ID
1615 /// @param <IN> \b pSecure: 0: non-secure 1:secure
1616 /// @param <OUT> \b None:
1617 /// @param <RET> \b RET
1618 /// @param <GLOBAL> \b None :
1619 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureSlaveQuery(MS_U32 u32SlaveId,MS_BOOL * pSecure)1620 MS_BOOL HAL_Seal_SecureSlaveQuery(MS_U32 u32SlaveId, MS_BOOL *pSecure)
1621 {
1622 MS_U32 u32RegAddr;
1623 MS_U16 u16Val;
1624 MS_S32 s32HwIdx;
1625 MS_U8 u8GroupId;
1626 MS_U8 u8ClientId;
1627 MS_BOOL bIsPm;
1628
1629 bIsPm = 0;
1630 s32HwIdx = HAL_SEAL_GetNonPmIpIdx(u32SlaveId);
1631
1632 //Slave ID not in Non-PM group, check if u32SlaveId in PM group
1633 if(s32HwIdx == -1)
1634 {
1635 s32HwIdx = HAL_SEAL_GetPmIpIdx(u32SlaveId);
1636 bIsPm = 1;
1637
1638 //Slave ID not in Non-PM nor PM group
1639 if(s32HwIdx == -1)
1640 {
1641 HAL_SEAL_ERR("Slave ID:%ld doesn't exist !\n", u32SlaveId);
1642 return FALSE;
1643 }
1644 }
1645
1646 if(bIsPm == 0)
1647 {
1648 u8GroupId = (MS_U8)(s32HwIdx / SEAL_NONPM_GROUP_IP_NUM);
1649 u8ClientId = (MS_U8)(s32HwIdx % SEAL_NONPM_GROUP_IP_NUM);
1650 u32RegAddr = (MS_U32)(REG_TZPC_NONPM_SECURE_SLAVE + (u8GroupId * 2));
1651
1652 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1653 }
1654 else
1655 {
1656 u8GroupId = (MS_U8)(s32HwIdx / SEAL_PM_GROUP_IP_NUM);
1657 u8ClientId = (MS_U8)(s32HwIdx % SEAL_PM_GROUP_IP_NUM);
1658 u32RegAddr = (MS_U32)(REG_TZPC_PM_SECURE_SLAVE + (u8GroupId * 2));
1659
1660 u16Val = HAL_SEAL_PmRead2Byte(u32RegAddr);
1661 }
1662
1663 if(u16Val & (1 << u8ClientId))
1664 {
1665 *pSecure = 0;
1666 }
1667 else
1668 {
1669 *pSecure = 1;
1670 }
1671
1672 return TRUE;
1673 }
1674
1675 ////////////////////////////////////////////////////////////////////////////////
1676 /// @brief \b Function \b Name: HAL_Seal_SecureMasterSet
1677 /// @brief \b Function \b Description: Define the specific master IP be secure or not
1678 /// @param <IN> \b u32SlaveId: Master ID
1679 /// @param <IN> \b bSecure: 0: non-secure 1:secure
1680 /// @param <OUT> \b None:
1681 /// @param <RET> \b RET
1682 /// @param <GLOBAL> \b None :
1683 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureMasterSet(MS_U32 u32MasterId,MS_BOOL bSecure)1684 MS_BOOL HAL_Seal_SecureMasterSet(MS_U32 u32MasterId, MS_BOOL bSecure)
1685 {
1686 MS_U32 u32RegAddr;
1687 MS_U16 u16Val;
1688 MS_S32 s32HwIdx;
1689 MS_U8 u8GroupId;
1690 MS_U8 u8ClientId;
1691
1692 s32HwIdx = HAL_SEAL_GetNonPmIpIdx(u32MasterId);
1693
1694 if(s32HwIdx == -1)
1695 {
1696 HAL_SEAL_ERR("Master ID:%ld doesn't exist !\n", u32MasterId);
1697 return FALSE;
1698 }
1699
1700 u8GroupId = (MS_U8)(s32HwIdx / SEAL_NONPM_GROUP_IP_NUM);
1701 u8ClientId = (MS_U8)(s32HwIdx % SEAL_NONPM_GROUP_IP_NUM);
1702 u32RegAddr = (MS_U32)(REG_TZPC_NONPM_SECURE_MASTER + (u8GroupId * 2));
1703
1704 if(bSecure == 1)
1705 {
1706 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1707 u16Val = u16Val & (~(1 << u8ClientId));
1708 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1709 }
1710 else
1711 {
1712 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1713 u16Val = u16Val | (1 << u8ClientId);
1714 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1715 }
1716
1717 return TRUE;
1718 }
1719
1720 ////////////////////////////////////////////////////////////////////////////////
1721 /// @brief \b Function \b Name: HAL_Seal_SecureMasterQuery
1722 /// @brief \b Function \b Description: Query the specific master IP be secure or not
1723 /// @param <IN> \b u32SlaveId: Master ID
1724 /// @param <IN> \b pSecure: 0: non-secure 1:secure
1725 /// @param <OUT> \b None:
1726 /// @param <RET> \b RET
1727 /// @param <GLOBAL> \b None :
1728 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_SecureMasterQuery(MS_U32 u32MasterId,MS_BOOL * pSecure)1729 MS_BOOL HAL_Seal_SecureMasterQuery(MS_U32 u32MasterId, MS_BOOL *pSecure)
1730 {
1731 MS_U32 u32RegAddr;
1732 MS_U16 u16Val;
1733 MS_S32 s32HwIdx;
1734 MS_U8 u8GroupId;
1735 MS_U8 u8ClientId;
1736
1737 s32HwIdx = HAL_SEAL_GetNonPmIpIdx(u32MasterId);
1738
1739 if(s32HwIdx == -1)
1740 {
1741 HAL_SEAL_ERR("PM Master ID:%ld doesn't exist !\n", u32MasterId);
1742 return FALSE;
1743 }
1744
1745 u8GroupId = (MS_U8)(s32HwIdx / SEAL_NONPM_GROUP_IP_NUM);
1746 u8ClientId = (MS_U8)(s32HwIdx % SEAL_NONPM_GROUP_IP_NUM);
1747 u32RegAddr = (MS_U32)(REG_TZPC_NONPM_SECURE_MASTER + (u8GroupId * 2));
1748
1749 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1750
1751 if(u16Val & (1 << u8ClientId))
1752 {
1753 *pSecure = 0;
1754 }
1755 else
1756 {
1757 *pSecure = 1;
1758 }
1759
1760 return TRUE;
1761 }
1762
1763 ////////////////////////////////////////////////////////////////////////////////
1764 /// @brief \b Function \b Name: HAL_Seal_BufferLock
1765 /// @brief \b Function \b Description: Lock the specific buffer
1766 /// @param <IN> \b u8SecureRangeId: Secure buffer ID
1767 /// @param <IN> \b bLock: 0: unlock 1:lock
1768 /// @param <OUT> \b None:
1769 /// @param <RET> \b RET
1770 /// @param <GLOBAL> \b None :
1771 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_BufferLock(MS_U8 u8BufferLockId,MS_BOOL bLock)1772 MS_BOOL HAL_Seal_BufferLock(MS_U8 u8BufferLockId, MS_BOOL bLock)
1773 {
1774 MS_U32 u32RegAddr;
1775 MS_U16 u16Val;
1776 MS_S32 s32HwIdx;
1777 MS_U8 u8GroupId;
1778 MS_U8 u8ClientId;
1779
1780 s32HwIdx = HAL_SEAL_GetLockIdx(u8BufferLockId);
1781
1782 //Check if u8SecureBufferId exist
1783 if(s32HwIdx == -1)
1784 {
1785 HAL_SEAL_ERR("Secure buffer lock ID:%d doesn't exist !\n", u8BufferLockId);
1786 return FALSE;
1787 }
1788
1789 u8GroupId = (MS_U8)(s32HwIdx / SEAL_LOCK_NUM_PERGROUP);
1790 u8ClientId = (MS_U8)(s32HwIdx % SEAL_LOCK_NUM_PERGROUP);
1791 u32RegAddr = (MS_U32)(REG_TZPC_BUFFER_LOCK + (u8GroupId * 2));
1792
1793 if(bLock == 1)
1794 {
1795 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1796 u16Val = u16Val & (~(1 << u8ClientId));
1797 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1798 }
1799 else
1800 {
1801 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1802 u16Val = u16Val | (1 << u8ClientId);
1803 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, u16Val);
1804 }
1805
1806 return TRUE;
1807 }
1808
1809
HAL_Seal_QueryBufferLocked(eSeal_Lock eLockId,MS_BOOL * bLocked)1810 MS_BOOL HAL_Seal_QueryBufferLocked(eSeal_Lock eLockId, MS_BOOL* bLocked)
1811 {
1812 MS_U32 u32RegAddr;
1813 MS_U16 u16Val;
1814 MS_S32 s32HwIdx;
1815 MS_U8 u8GroupId;
1816 MS_U8 u8ClientId;
1817
1818 s32HwIdx = HAL_SEAL_GetLockIdx(eLockId);
1819
1820 //Check if u8SecureBufferId exist
1821 if(s32HwIdx == -1)
1822 {
1823 HAL_SEAL_ERR("Secure buffer lock ID:%u doesn't exist !\n", (unsigned int)eLockId);
1824 return FALSE;
1825 }
1826
1827 u8GroupId = (MS_U8)(s32HwIdx / SEAL_LOCK_NUM_PERGROUP);
1828 u8ClientId = (MS_U8)(s32HwIdx % SEAL_LOCK_NUM_PERGROUP);
1829 u32RegAddr = (MS_U32)(REG_TZPC_BUFFER_LOCK + (u8GroupId * 2));
1830
1831 u16Val = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1832 *bLocked = (u16Val & (1 << u8ClientId)) ? FALSE : TRUE;
1833
1834 return TRUE;
1835 }
1836
1837
1838 ////////////////////////////////////////////////////////////////////////////////
1839 /// @brief \b Function \b Name: HAL_Seal_MaskInterruptFlag
1840 /// @brief \b Function \b Description: mask/unmask irq mask bit
1841 /// @param <IN> \b u8MiuDev: 0: MIU0 1:MIU1
1842 /// @param <IN> \b bMask: FLASE: unmask ; TRUE: mask
1843 /// @param <OUT> \b None:
1844 /// @param <RET> \b RET:
1845 /// @param <GLOBAL> \b None :
1846 ////////////////////////////////////////////////////////////////////////////////
HAL_Seal_MaskInterruptFlag(MS_U8 u8MiuDev,MS_BOOL bMask)1847 MS_BOOL HAL_Seal_MaskInterruptFlag(MS_U8 u8MiuDev, MS_BOOL bMask)
1848 {
1849 MS_U32 u32RegLogAddr;
1850
1851 u32RegLogAddr = (u8MiuDev) ? REG_SECURE1_HITTED_STATUS : REG_SECURE0_HITTED_STATUS;
1852
1853 HAL_SEAL_NonPmWrite2BytesBit(u32RegLogAddr, bMask, REG_SECURE_HITTED_IRQ_MASK);
1854 HAL_SEAL_NonPmWrite2BytesBit(u32RegLogAddr, bMask, REG_SECURE_HITTED_IRQ_MASK);
1855 return TRUE;
1856 }
1857
1858
HAL_SEAL_POWER_SUSPEND(void)1859 MS_BOOL HAL_SEAL_POWER_SUSPEND(void)
1860 {
1861 MS_U32 u32RegAddr = 0;
1862 MS_U32 u32RegOffset = 0;
1863 MS_U16 index;
1864
1865 //Secure range
1866 for ( index = 0; index < SEAL_SECURE_RANGE_RIU_NUM; index++ )
1867 {
1868 u32RegAddr = REG_SECURE0_RANGE0_START_ADDR + u32RegOffset;
1869 SEAL_SECURE0_Buffer[index] = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1870
1871 u32RegAddr = REG_SECURE1_RANGE0_START_ADDR + u32RegOffset;
1872 SEAL_SECURE1_Buffer[index] = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1873
1874 u32RegOffset += 0x02;
1875 }
1876
1877 //Detect enable
1878 SEAL_SECURE0_Buffer[0x76] = HAL_SEAL_NonPmRead2Byte(REG_SECURE0_DETECT_ENABLE);
1879 SEAL_SECURE1_Buffer[0x76] = HAL_SEAL_NonPmRead2Byte(REG_SECURE1_DETECT_ENABLE);
1880
1881 //Secure range lock
1882 SEAL_SECURE0_Buffer[0x7f] = HAL_SEAL_NonPmRead2Byte(REG_SECURE0_LOCK);
1883 SEAL_SECURE1_Buffer[0x7f] = HAL_SEAL_NonPmRead2Byte(REG_SECURE1_LOCK);
1884
1885 u32RegOffset = 0x00;
1886 for ( index = 0; index < SEAL_BANK_RIU_NUM; index++ )
1887 {
1888 //tzpc_nonpm
1889 u32RegAddr = SEAL_TZPC_NONPM + u32RegOffset;
1890 SEAL_TZPC_NONPM_Buffer[index] = HAL_SEAL_NonPmRead2Byte(u32RegAddr);
1891
1892 u32RegOffset += 0x02;
1893 }
1894
1895 return TRUE;
1896 }
1897
HAL_SEAL_POWER_RESUME(void)1898 MS_BOOL HAL_SEAL_POWER_RESUME(void)
1899 {
1900 MS_U32 u32RegAddr = 0;
1901 MS_U32 u32RegOffset = 0;
1902 MS_U16 index;
1903 MS_U16 addr_dyn = 1;
1904
1905 //Secure range
1906 for ( index = 0; index < SEAL_SECURE_RANGE_RIU_NUM; index++ )
1907 {
1908 //addr dyn
1909 if (addr_dyn == 4)
1910 {
1911 SEAL_SECURE0_Buffer[index] |= 0x8000;
1912 SEAL_SECURE1_Buffer[index] |= 0x8000;
1913 addr_dyn = 0;
1914 }
1915
1916 u32RegAddr = REG_SECURE0_RANGE0_START_ADDR + u32RegOffset;
1917 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, SEAL_SECURE0_Buffer[index]);
1918
1919 u32RegAddr = REG_SECURE1_RANGE0_START_ADDR + u32RegOffset;
1920 HAL_SEAL_NonPmWrite2Byte(u32RegAddr, SEAL_SECURE1_Buffer[index]);
1921
1922 u32RegOffset += 0x02;
1923 addr_dyn++;
1924 }
1925
1926 //Detect enable
1927 HAL_SEAL_NonPmWrite2Byte(REG_SECURE0_DETECT_ENABLE,SEAL_SECURE0_Buffer[0x76]);
1928 HAL_SEAL_NonPmWrite2Byte(REG_SECURE1_DETECT_ENABLE,SEAL_SECURE1_Buffer[0x76]);
1929
1930 //Secure range lock
1931 HAL_SEAL_NonPmWrite2Byte(REG_SECURE0_LOCK,SEAL_SECURE0_Buffer[0x7f]);
1932 HAL_SEAL_NonPmWrite2Byte(REG_SECURE1_LOCK,SEAL_SECURE1_Buffer[0x7f]);
1933
1934 u32RegOffset = 0x00;
1935 for ( index = 0; index < SEAL_BANK_RIU_NUM; index++ )
1936 {
1937 //tzpc_nonpm
1938 u32RegAddr = SEAL_TZPC_NONPM + u32RegOffset;
1939 HAL_SEAL_NonPmWrite2Byte(u32RegAddr,SEAL_TZPC_NONPM_Buffer[index]);
1940
1941 u32RegOffset += 0x02;
1942 }
1943
1944 return TRUE;
1945 }
1946