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Searched defs:UVD_MPC_SET_MUXA0__VARA_2__SHIFT (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h600 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT … macro
H A Duvd_3_1_sh_mask.h482 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT 0xc macro
H A Duvd_4_0_sh_mask.h501 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT 0x0000000c macro
H A Duvd_4_2_sh_mask.h486 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT 0xc macro
H A Duvd_5_0_sh_mask.h518 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT 0xc macro
H A Duvd_6_0_sh_mask.h520 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT 0xc macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1107 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2848 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2613 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3921 #define UVD_MPC_SET_MUXA0__VARA_2__SHIFT … macro