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/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/include/
H A DSub_Text.bin125x4��������Init������������OFF�L_RGB2YCC_SD�F_RGB2YCC_SD�L_RGB2YCC_HD�F_RGB2YCC_HD���������OFF�ON��…
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/include/
H A DSub_Text.bin125x4��������Init������������OFF�L_RGB2YCC_SD�F_RGB2YCC_SD�L_RGB2YCC_HD�F_RGB2YCC_HD���������OFF�ON��…
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMain_Text.bin134x4��������Init������������OFF�Full_RGB2YCC709_Full�Limit_RGB2YCC709_Full�Limit_YCC2YCC_Full�Full_R…
/utopia/UTPA2-700.0.x/modules/gpd/drv/gpd/
H A Dpngconf.h1579 # define png_snprintf6(s1,n,fmt,x1,x2,x3,x4,x5,x6) \ argument
1580 sprintf(s1,fmt,x1,x2,x3,x4,x5,x6)
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/include/
H A DCurry_SC1_Main_Text.bin132x4��������Init������������OFF�L_RGB2YCC_SD�F_RGB2YCC_SD�L_RGB2YCC_HD�F_RGB2YCC_HD���������OFF�ON��…
H A DKano_SC1_Main_Text.bin132x4��������Init������������OFF�L_RGB2YCC_SD�F_RGB2YCC_SD�L_RGB2YCC_HD�F_RGB2YCC_HD���������OFF�ON��…
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/include/
H A DKano_SC1_Main_Text.bin132x4��������Init������������OFF�L_RGB2YCC_SD�F_RGB2YCC_SD�L_RGB2YCC_HD�F_RGB2YCC_HD���������OFF�ON��…
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/include/
H A Dk6_SC1_Main_Text.bin140x4��������Init������������OFF�L_RGB2YCC_SD�F_RGB2YCC_SD�L_RGB2YCC_HD�F_RGB2YCC_HD���������OFF�ON��…
/utopia/UTPA2-700.0.x/projects/build/
H A Dpreprocess.txt2675 E_LD_PANEL_LG55inch_LR16 = 0x4,
10836 E_MS_FMT_I8 = 0x4,
13650 E_XC_DIP_EX_CAP_SCALING_DOWN = 0x4,
22764 _CR7Y8 = 0x4,
24274 _T2_CR4Y5 = 0x4,
24963 E_INPUT_SUPPORT_MHL_PORT_DVI2 = 0x4,
30718 E_CF_OP_TYPE_OP_MFR_TEST = 0x4
30727 E_CF_TRANS_STATUS_BUSY_OP = 0x4,
30753 E_CF_OPERATION_TYPE_OP_MFR_TEST = 0x4,
30822 E_CFKE_TRANS_STATUS_BUSY_OP = 0x4,
[all …]
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c.0613 //eg. input:30, original x2 out:60, but for 120hz panel, we should x4 out:120.
614 // the multiple is from x2 to x4
627 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "FRC table FRC_OUT x4 for 240 hz panel output\n")
3200 // in FB mode we set to 0x5 (originally progressive = 0x3, interlace = 0x4)
9094 case 0x4:
H A Dmvideo.c.01454 gSrcInfo[eWindow].Status2.stMemCfgMap[E_XC_BWR_MEM_CONFIG_2].u16BWR_MEM_CFG_VALUE = 0x4;