Searched refs:u3phy_A_base (Results 1 – 2 of 2) sorted by relevance
545 …writew(0x0104, (void*) (xhci->u3phy_A_base+0x6*2)); // for Enable 1G clock pass to UTMI //[2] reg… in U3phy_MS28_init()548 writew(0x0, (void*) (xhci->u3phy_A_base)); // power on rx atop in U3phy_MS28_init()549 writew(0x0, (void*) (xhci->u3phy_A_base+0x2*2)); // power on tx atop in U3phy_MS28_init()551 writew(0x0, (void*) (xhci->u3phy_A_base+0x3A*2)); // overwrite power on rx/tx atop in U3phy_MS28_init()557 …writew(0x308, (void*) (xhci->u3phy_A_base+0x3A*2)); // [9,8,3] PD_TXCLK_USB3TXPLL, PD_USB3_IBIA… in U3phy_MS28_init()558 …writeb(readb((void*)(xhci->u3phy_A_base+0x3*2-1)) & 0xbb, (void*)(xhci->u3phy_A_base+0x3*2-1))… in U3phy_MS28_init()
251 MS_U32 u3phy_A_base; member