Searched refs:sthal_FRC (Results 1 – 6 of 6) sorted by relevance
544 pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld = MHal_FRC_get_miu0mask(); in MHal_FRC_Enable_MiuMask()545 pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld = MHal_FRC_get_miu1mask(); in MHal_FRC_Enable_MiuMask()547 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld; in MHal_FRC_Enable_MiuMask()548 pXCResourcePrivate->sthal_FRC.FRC_Miu1Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld; in MHal_FRC_Enable_MiuMask()550 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG0Mask |= MIU_FRC_G0REQUEST_MASK; in MHal_FRC_Enable_MiuMask()551 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG1Mask |= MIU_FRC_G1REQUEST_MASK; in MHal_FRC_Enable_MiuMask()552 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG2Mask |= MIU_FRC_G2REQUEST_MASK; in MHal_FRC_Enable_MiuMask()553 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG3Mask |= MIU_FRC_G3REQUEST_MASK; in MHal_FRC_Enable_MiuMask()554 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG4Mask |= MIU_FRC_G4REQUEST_MASK; in MHal_FRC_Enable_MiuMask()555 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG5Mask |= MIU_FRC_G5REQUEST_MASK; in MHal_FRC_Enable_MiuMask()[all …]
722 pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld = MHal_FRC_get_miu0mask(); in MHal_FRC_Enable_MiuMask()723 pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld = MHal_FRC_get_miu1mask(); in MHal_FRC_Enable_MiuMask()725 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld; in MHal_FRC_Enable_MiuMask()726 pXCResourcePrivate->sthal_FRC.FRC_Miu1Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld; in MHal_FRC_Enable_MiuMask()728 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG0Mask |= MIU_FRC_G0REQUEST_MASK; in MHal_FRC_Enable_MiuMask()729 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG1Mask |= MIU_FRC_G1REQUEST_MASK; in MHal_FRC_Enable_MiuMask()730 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG2Mask |= MIU_FRC_G2REQUEST_MASK; in MHal_FRC_Enable_MiuMask()731 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG3Mask |= MIU_FRC_G3REQUEST_MASK; in MHal_FRC_Enable_MiuMask()732 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG4Mask |= MIU_FRC_G4REQUEST_MASK; in MHal_FRC_Enable_MiuMask()733 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG5Mask |= MIU_FRC_G5REQUEST_MASK; in MHal_FRC_Enable_MiuMask()[all …]
705 pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld = MHal_FRC_get_miu0mask(); in MHal_FRC_Enable_MiuMask()706 pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld = MHal_FRC_get_miu1mask(); in MHal_FRC_Enable_MiuMask()708 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld; in MHal_FRC_Enable_MiuMask()709 pXCResourcePrivate->sthal_FRC.FRC_Miu1Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld; in MHal_FRC_Enable_MiuMask()711 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG0Mask |= MIU_FRC_G0REQUEST_MASK; in MHal_FRC_Enable_MiuMask()712 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG1Mask |= MIU_FRC_G1REQUEST_MASK; in MHal_FRC_Enable_MiuMask()713 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG2Mask |= MIU_FRC_G2REQUEST_MASK; in MHal_FRC_Enable_MiuMask()714 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG3Mask |= MIU_FRC_G3REQUEST_MASK; in MHal_FRC_Enable_MiuMask()715 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG4Mask |= MIU_FRC_G4REQUEST_MASK; in MHal_FRC_Enable_MiuMask()716 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG5Mask |= MIU_FRC_G5REQUEST_MASK; in MHal_FRC_Enable_MiuMask()[all …]
683 …pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld = MHal_FRC_get_miu2mask(); // FRC not support MIU0, … in MHal_FRC_Enable_MiuMask()684 pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld = MHal_FRC_get_miu1mask(); in MHal_FRC_Enable_MiuMask()686 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu0MaskOld; in MHal_FRC_Enable_MiuMask()687 pXCResourcePrivate->sthal_FRC.FRC_Miu1Mask = pXCResourcePrivate->sthal_FRC.FRC_Miu1MaskOld; in MHal_FRC_Enable_MiuMask()689 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG0Mask |= MIU_FRC_G0REQUEST_MASK; in MHal_FRC_Enable_MiuMask()690 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG1Mask |= MIU_FRC_G1REQUEST_MASK; in MHal_FRC_Enable_MiuMask()691 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG2Mask |= MIU_FRC_G2REQUEST_MASK; in MHal_FRC_Enable_MiuMask()692 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG3Mask |= MIU_FRC_G3REQUEST_MASK; in MHal_FRC_Enable_MiuMask()693 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG4Mask |= MIU_FRC_G4REQUEST_MASK; in MHal_FRC_Enable_MiuMask()694 pXCResourcePrivate->sthal_FRC.FRC_Miu0Mask.u16MiuG5Mask |= MIU_FRC_G5REQUEST_MASK; in MHal_FRC_Enable_MiuMask()[all …]
1430 ST_HAL_FRC sthal_FRC; member