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Searched refs:cont3 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
678 SRAM3_IHC[cont3++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
737 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
738 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
763 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
764 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
770 _Hal_PQ_set_sram_ihc_crd_table(&SRAM3_IHC[0], 2, cont3); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/
H A Dmhal_pq.c661 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
680 SRAM3_IHC[cont3++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
702 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
715 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
739 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
740 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
765 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
766 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
772 _Hal_PQ_set_sram_ihc_crd_table(&SRAM3_IHC[0], 2, cont3); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
678 SRAM3_IHC[cont3++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
737 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
738 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
763 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
764 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
770 _Hal_PQ_set_sram_ihc_crd_table(&SRAM3_IHC[0], 2, cont3); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
678 SRAM3_IHC[cont3++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
737 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
738 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
763 SRAM3_IHC[cont3]=data; in Hal_PQ_set_sram_ihc_crd_table()
764 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
770 _Hal_PQ_set_sram_ihc_crd_table(&SRAM3_IHC[0], 2, cont3); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/xc/drv/ace/
H A DdrvACE.c954 MS_U16 cont1, cont2, cont3, cont4; in MDrv_XC_ACE_Set_IHC_SRAM() local
968 cont1 = cont2 = cont3 = cont4 = 0; in MDrv_XC_ACE_Set_IHC_SRAM()
992 SRAM3_IHC[cont3]=data; in MDrv_XC_ACE_Set_IHC_SRAM()
993 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()
1017 SRAM3_IHC[cont3]=data; in MDrv_XC_ACE_Set_IHC_SRAM()
1018 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()
1024 Hal_ACE_Set_IHC_SRAM(pInstance, &SRAM3_IHC[0], 2, cont3); in MDrv_XC_ACE_Set_IHC_SRAM()
/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/
H A Dmhal_pq.c594 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
620 SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
622 cont3++; in Hal_PQ_set_sram_icc_crd_table()
730 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
756 SRAM3_IHC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
758 cont3++; in Hal_PQ_set_sram_ihc_crd_table()
1360 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1386 UFSC_SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1388 cont3++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1453 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1055 SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1057 cont3++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1191 SRAM3_IHC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1193 cont3++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1822 UFSC_SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1824 cont3++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1055 SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1057 cont3++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1191 SRAM3_IHC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1193 cont3++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1822 UFSC_SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1824 cont3++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1055 SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1057 cont3++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1191 SRAM3_IHC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1193 cont3++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1822 UFSC_SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1824 cont3++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1055 SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1057 cont3++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1191 SRAM3_IHC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1193 cont3++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1822 UFSC_SRAM3_ICC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1824 cont3++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/
H A Dmhal_pq.c846 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
872 SRAM3_IHC[cont3] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
874 cont3++; in Hal_PQ_set_sram_ihc_crd_table()