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Searched refs:cont2 (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/
H A Dmhal_pq.c594 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
613 SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
615 cont2++; in Hal_PQ_set_sram_icc_crd_table()
730 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
749 SRAM2_IHC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
751 cont2++; in Hal_PQ_set_sram_ihc_crd_table()
1360 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1379 UFSC_SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1381 cont2++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1453 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
674 SRAM2_IHC[cont2++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
731 SRAM2_IHC[cont2]=data; in Hal_PQ_set_sram_ihc_crd_table()
732 cont2 = cont2 < MAX_SRAM_SIZE-1 ? cont2+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
769 _Hal_PQ_set_sram_ihc_crd_table(&SRAM2_IHC[0], 1, cont2); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/
H A Dmhal_pq.c661 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
676 SRAM2_IHC[cont2++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
702 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
715 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
733 SRAM2_IHC[cont2]=data; in Hal_PQ_set_sram_ihc_crd_table()
734 cont2 = cont2 < MAX_SRAM_SIZE-1 ? cont2+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
771 _Hal_PQ_set_sram_ihc_crd_table(&SRAM2_IHC[0], 1, cont2); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
674 SRAM2_IHC[cont2++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
731 SRAM2_IHC[cont2]=data; in Hal_PQ_set_sram_ihc_crd_table()
732 cont2 = cont2 < MAX_SRAM_SIZE-1 ? cont2+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
769 _Hal_PQ_set_sram_ihc_crd_table(&SRAM2_IHC[0], 1, cont2); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/
H A Dmhal_pq.c659 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
674 SRAM2_IHC[cont2++] = u32Addr[u16Index]; in Hal_PQ_set_sram_ihc_crd_table()
700 MS_U16 cont1, cont2, cont3, cont4; in Hal_PQ_set_sram_ihc_crd_table()
713 cont1 = cont2 = cont3 = cont4 = 0; in Hal_PQ_set_sram_ihc_crd_table()
731 SRAM2_IHC[cont2]=data; in Hal_PQ_set_sram_ihc_crd_table()
732 cont2 = cont2 < MAX_SRAM_SIZE-1 ? cont2+1 : MAX_SRAM_SIZE-1; in Hal_PQ_set_sram_ihc_crd_table()
769 _Hal_PQ_set_sram_ihc_crd_table(&SRAM2_IHC[0], 1, cont2); in Hal_PQ_set_sram_ihc_crd_table()
/utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1048 SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1050 cont2++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1184 SRAM2_IHC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1186 cont2++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1815 UFSC_SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1817 cont2++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1048 SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1050 cont2++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1184 SRAM2_IHC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1186 cont2++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1815 UFSC_SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1817 cont2++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1048 SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1050 cont2++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1184 SRAM2_IHC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1186 cont2++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1815 UFSC_SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1817 cont2++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/
H A Dmhal_pq.c1029 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_icc_crd_table() local
1048 SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_icc_crd_table()
1050 cont2++; in Hal_PQ_set_sram_icc_crd_table()
1165 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
1184 SRAM2_IHC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
1186 cont2++; in Hal_PQ_set_sram_ihc_crd_table()
1796 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_icc_crd_table() local
1815 UFSC_SRAM2_ICC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_UFSC_sram_icc_crd_table()
1817 cont2++; in Hal_PQ_set_UFSC_sram_icc_crd_table()
1889 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_UFSC_sram_ihc_crd_table() local
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/utopia/UTPA2-700.0.x/modules/xc/drv/ace/
H A DdrvACE.c954 MS_U16 cont1, cont2, cont3, cont4; in MDrv_XC_ACE_Set_IHC_SRAM() local
968 cont1 = cont2 = cont3 = cont4 = 0; in MDrv_XC_ACE_Set_IHC_SRAM()
986 SRAM2_IHC[cont2]=data; in MDrv_XC_ACE_Set_IHC_SRAM()
987 cont2 = cont2 < MAX_SRAM_SIZE-1 ? cont2+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()
1023 Hal_ACE_Set_IHC_SRAM(pInstance, &SRAM2_IHC[0], 1, cont2); in MDrv_XC_ACE_Set_IHC_SRAM()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/
H A Dmhal_pq.c846 MS_U16 cont1=0, cont2=0, cont3=0, cont4=0; in Hal_PQ_set_sram_ihc_crd_table() local
865 SRAM2_IHC[cont2] = (u32Addr[u16Index]); in Hal_PQ_set_sram_ihc_crd_table()
867 cont2++; in Hal_PQ_set_sram_ihc_crd_table()