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Searched refs:console_printf (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/gpd/drv/gpd/
H A Dpngprocess.c175 console_printf("ofifo_wr_cs[2:0] = 0x%tx \n", (ptrdiff_t)_reg_iofifo_state&0x7); in PNG_Get_reg_iofifo_state()
176 console_printf("ofifo_rd_cs[2:0] = 0x%tx \n", (ptrdiff_t)(_reg_iofifo_state>>3)&0x7); in PNG_Get_reg_iofifo_state()
177 console_printf("ififo_eco_rd[2:0] = 0x%tx \n", (ptrdiff_t)(_reg_iofifo_state>>6)&0x7); in PNG_Get_reg_iofifo_state()
178 console_printf("ififo_eco_wr = 0x%tx \n", (ptrdiff_t)(_reg_iofifo_state>>9)&0x1); in PNG_Get_reg_iofifo_state()
186 console_printf("rw_st[2:0] = 0x%tx \n", (ptrdiff_t)_reg_png_state&0x7); in PNG_Get_reg_png_state()
187 console_printf("decom_st[2:0] = 0x%tx \n", (ptrdiff_t)(_reg_png_state>>3)&0x7); in PNG_Get_reg_png_state()
188 console_printf("fifo_empty = 0x%tx \n", (ptrdiff_t)(_reg_png_state>>6)&0x1); in PNG_Get_reg_png_state()
189 console_printf("decom_rdy = 0x%tx \n", (ptrdiff_t)(_reg_png_state>>7)&0x1); in PNG_Get_reg_png_state()
190 console_printf("deflt_ack_ufifo0 = 0x%tx \n", (ptrdiff_t)(_reg_png_state>>8)&0x1); in PNG_Get_reg_png_state()
191 console_printf("deflt_st[1:0] = 0x%tx \n", (ptrdiff_t)(_reg_png_state>>9)&0x3); in PNG_Get_reg_png_state()
[all …]
H A Ddrvgpd.c105 console_printf("===========================================================\n"); in _GPD_PrintMem()
106 console_printf("print memory addr=0x%tx, size=0x%tx\n", (ptrdiff_t)u32Addr, (ptrdiff_t)u32Size); in _GPD_PrintMem()
107 console_printf("===========================================================\n"); in _GPD_PrintMem()
111 …console_printf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x \n… in _GPD_PrintMem()
118 console_printf("===========================================================\n"); in _GPD_PrintMem()
294 console_printf("RIFIFO_EMPTY\n"); in read_bits()
303 console_printf("SIFIFO_EMPTY\n"); in show_bits()
316 console_printf("PNG state = %tx\n", (ptrdiff_t)data); in drv_gpd_dbg_dump()
317 console_printf("Block stop = %tx\n", (ptrdiff_t)num); in drv_gpd_dbg_dump()
318 console_printf("Block Type = %tx\n",(ptrdiff_t) blk_typ); in drv_gpd_dbg_dump()
[all …]
H A Ddgif_lib.c380 …console_printf("frame roi: %td, %td, %td, %td\n", (ptrdiff_t)frame_roi.hstart, (ptrdiff_t)frame_r… in GetFrameROI()
428 console_printf("Unsupported output color %td\n", (ptrdiff_t)ocolor_typ); in MstDGifProcess()
446 …console_printf("width = %td, height = %td\n", (ptrdiff_t)GifFile->SWidth, (ptrdiff_t)GifFile->SHei… in MstDGifProcess()
491 console_printf("Frame buffer is too small\n"); in MstDGifProcess()
502 console_printf("Invalidate cache\n"); in MstDGifProcess()
592 console_printf("flush done\n"); in MstDGifProcess()
608 console_printf("gif go\n"); in MstDGifProcess()
614 console_printf("Ofifo done but gif done.\n"); in MstDGifProcess()
629 console_printf("gif done\n"); in MstDGifProcess()
633 console_printf("Invalidate cache\n"); in MstDGifProcess()
[all …]
H A Dmdrvgpd.c96 console_printf("mdrv_gpd_setbuf\n"); in mdrv_gpd_setbuf()
101 console_printf("GPD_REG_BASE = 0x%tx\n", (ptrdiff_t)GPD_REG_BASE); in mdrv_gpd_setbuf()
102 console_printf("READBITBASE = 0x%tx\n", (ptrdiff_t)READBITBASE); in mdrv_gpd_setbuf()
110 console_printf("mdrv_gpd_init\n"); in mdrv_gpd_init()
134 console_printf("mdrv_gpd_decode\n"); in mdrv_gpd_decode()
144 console_printf("Signaute = %x,%x,%x,%x\n",sig[0],sig[1],sig[2],sig[3]); in mdrv_gpd_decode()
150 console_printf("GIF Decode!!\n"); in mdrv_gpd_decode()
155 console_printf("GIF Decode error!!\n"); in mdrv_gpd_decode()
179 console_printf("PNG Decode!!\n"); in mdrv_gpd_decode()
192 console_printf("Decode Done!!!"); in mdrv_gpd_decode()
[all …]
H A Dgpd.h138 #define console_printf(format, args...) do{if(eEnableDbgMsg & E_GPD_DEBUG_LEVEL_INFO) ULOGI… macro
153 #define console_printf(format, args...) do{if(eEnableDbgMsg & E_GPD_DEBUG_LEVEL_INFO) printk(form… macro
157 #define console_printf(format, args...) do{if(eEnableDbgMsg & E_GPD_DEBUG_LEVEL_INFO) printf(form… macro
163 #define console_printf(format, args...) do{if(eEnableDbgMsg & E_GPD_DEBUG_LEVEL_INFO) ALOG… macro
167 #define console_printf(format, args...) do{if(eEnableDbgMsg & E_GPD_DEBUG_LEVEL_INFO) LOGI… macro
175 #define console_printf(...) macro
H A Dgif_err.c219 console_printf("\nGIF-LIB error: %s.\n", Err); in PrintGifError()
224 console_printf("\nGIF-LIB undefined error %td.\n", (ptrdiff_t)_MstGifError); in PrintGifError()
/utopia/UTPA2-700.0.x/modules/gpd/api/gpd/
H A DapiGPD.c1236 console_printf("MAdp_GPD_Init\n"); in MAdp_GPD_Init()
1261 console_printf("Select MIU1\n"); in MAdp_GPD_Init()
1266 console_printf("Select MIU0\n"); in MAdp_GPD_Init()
1282 console_printf("Enable MIU Protection\n"); in MAdp_GPD_Init()
1288 console_printf("Get Color buffer\n"); in MAdp_GPD_Init()
1293 console_printf("Get Depth buffer\n"); in MAdp_GPD_Init()
1298 console_printf("Get Read buffer\n"); in MAdp_GPD_Init()
1303 console_printf("Get Write buffer\n"); in MAdp_GPD_Init()
1308 console_printf("GPDBaseAddr=0x%08x\n",pGPDContext->GpdAddrInfo.RegBaseAddr); in MAdp_GPD_Init()
1309 console_printf("READBITBaseAddr=0x%08x\n",pGPDContext->GpdAddrInfo.ReadBitBaseAddr); in MAdp_GPD_Init()
[all …]
/utopia/UTPA2-700.0.x/modules/gpd/hal/k6lite/gpd/
H A Dgpd_reg.c974 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1040 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1050 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1081 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1084 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1087 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1115 console_printf("@@@set gpd_clk off\n"); in hal_gpd_power_off()
1126 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1165 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/k6/gpd/
H A Dgpd_reg.c974 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1040 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1050 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1081 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1084 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1087 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1115 console_printf("@@@set gpd_clk off\n"); in hal_gpd_power_off()
1126 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1165 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/maxim/gpd/
H A Dgpd_reg.c970 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1035 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1039 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1058 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1061 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1064 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1079 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1119 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/M7621/gpd/
H A Dgpd_reg.c970 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1035 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1039 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1058 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1061 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1064 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1079 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1119 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/kano/gpd/
H A Dgpd_reg.c968 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1034 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1067 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1085 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1088 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1091 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1106 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1145 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/M7821/gpd/
H A Dgpd_reg.c970 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1035 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1039 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1058 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1061 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1064 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1079 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1119 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/maserati/gpd/
H A Dgpd_reg.c970 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1035 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1039 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1058 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1061 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1064 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1079 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1119 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/curry/gpd/
H A Dgpd_reg.c974 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1040 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1050 console_printf("GPD sram on\n"); in hal_gpd_init_outside_reg()
1110 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1113 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1116 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1144 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1183 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/manhattan/gpd/
H A Dgpd_reg.c961 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1026 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1042 console_printf("@@@set gpd_clk to 216MHz\n"); in hal_gpd_power_on()
1045 console_printf("@@@set gpd_clk to 192MHz\n"); in hal_gpd_power_on()
1048 console_printf("@@@set gpd_clk to 144MHz\n"); in hal_gpd_power_on()
1063 console_printf("GPD sram off\n"); in hal_gpd_power_off()
1102 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/maldives/gpd/
H A Dgpd_reg.c951 …console_printf("Reg read: %s = 0x%08x, offset = 0x%02X, lsb=%d, msb=%d\n", gpd_reg_name[index], (u… in GPD_GET_U32REG_dbg()
1012 console_printf("set i64 reg to 0x%x\n", tmp); in hal_gpd_init_outside_reg()
1047 console_printf("set miu client protect to 0x%x\n", tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/mustang/gpd/
H A Dgpd_reg.c955 …console_printf("Reg read: %s = 0x%08x, offset = 0x%02X, lsb=%d, msb=%d\n", gpd_reg_name[index], (u… in GPD_GET_U32REG_dbg()
1019 console_printf("set i64 reg to 0x%x\n", tmp); in hal_gpd_init_outside_reg()
1056 console_printf("set miu client protect to 0x%x\n", tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/mainz/gpd/
H A Dgpd_reg.c956 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1020 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1056 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/messi/gpd/
H A Dgpd_reg.c956 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1020 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1056 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/mooney/gpd/
H A Dgpd_reg.c956 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1021 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1057 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()
/utopia/UTPA2-700.0.x/modules/gpd/hal/macan/gpd/
H A Dgpd_reg.c956 …console_printf("Reg read: %s = 0x%08tx, offset = 0x%02tX, lsb=%td, msb=%td\n", gpd_reg_name[index]… in GPD_GET_MS_U32REG_dbg()
1022 console_printf("set i64 reg to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_init_outside_reg()
1058 console_printf("set miu client protect to 0x%tx\n", (ptrdiff_t)tmp); in hal_gpd_SetMIUProtectMask()