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Searched refs:bandwidth (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/demodulator/drv/dmd/t3/Int_DVBT/
H A DINTERN_DVBT.c1220 U8 bandwidth; in INTERN_DVBT_Config() local
1236 bandwidth = 1; in INTERN_DVBT_Config()
1239 bandwidth = 2; in INTERN_DVBT_Config()
1243 bandwidth = 3; in INTERN_DVBT_Config()
1273 gsCmdPacket.param[pc_config_bw] = bandwidth; in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBT2.c1325 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1335 bandwidth = 1; in INTERN_DVBT2_Config()
1338 bandwidth = 2; in INTERN_DVBT2_Config()
1341 bandwidth = 3; in INTERN_DVBT2_Config()
1344 bandwidth = 5; in INTERN_DVBT2_Config()
1347 bandwidth = 0; in INTERN_DVBT2_Config()
1351 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1166 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1175 bandwidth = 1; in INTERN_DVBT_Config()
1178 bandwidth = 2; in INTERN_DVBT_Config()
1182 bandwidth = 3; in INTERN_DVBT_Config()
1189 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/usb/drv/usb_ecos/usbhost/
H A DdrvHCD.c1380 urb->bandwidth = bustime; in usb_claim_bandwidth()
1454 dev->bus->bandwidth_allocated -= urb->bandwidth; in usb_release_bandwidth()
1462 urb->bandwidth, in usb_release_bandwidth()
1467 urb->bandwidth = 0; in usb_release_bandwidth()
1592 if (urb->bandwidth) in urb_unlink()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBT2.c1368 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1378 bandwidth = 1; in INTERN_DVBT2_Config()
1381 bandwidth = 2; in INTERN_DVBT2_Config()
1384 bandwidth = 3; in INTERN_DVBT2_Config()
1387 bandwidth = 5; in INTERN_DVBT2_Config()
1390 bandwidth = 0; in INTERN_DVBT2_Config()
1394 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1528 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1538 bandwidth = 1; in INTERN_DVBT_Config()
1541 bandwidth = 2; in INTERN_DVBT_Config()
1545 bandwidth = 3; in INTERN_DVBT_Config()
1552 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBT2.c1377 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1387 bandwidth = 1; in INTERN_DVBT2_Config()
1390 bandwidth = 2; in INTERN_DVBT2_Config()
1393 bandwidth = 3; in INTERN_DVBT2_Config()
1396 bandwidth = 5; in INTERN_DVBT2_Config()
1399 bandwidth = 0; in INTERN_DVBT2_Config()
1403 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1115 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1125 bandwidth = 1; in INTERN_DVBT_Config()
1128 bandwidth = 2; in INTERN_DVBT_Config()
1132 bandwidth = 3; in INTERN_DVBT_Config()
1139 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBT2.c1399 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1409 bandwidth = 1; in INTERN_DVBT2_Config()
1412 bandwidth = 2; in INTERN_DVBT2_Config()
1415 bandwidth = 3; in INTERN_DVBT2_Config()
1418 bandwidth = 5; in INTERN_DVBT2_Config()
1421 bandwidth = 0; in INTERN_DVBT2_Config()
1425 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1123 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1133 bandwidth = 1; in INTERN_DVBT_Config()
1136 bandwidth = 2; in INTERN_DVBT_Config()
1140 bandwidth = 3; in INTERN_DVBT_Config()
1147 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBT2.c1373 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1383 bandwidth = 1; in INTERN_DVBT2_Config()
1386 bandwidth = 2; in INTERN_DVBT2_Config()
1389 bandwidth = 3; in INTERN_DVBT2_Config()
1392 bandwidth = 5; in INTERN_DVBT2_Config()
1395 bandwidth = 0; in INTERN_DVBT2_Config()
1399 bandwidth = 4; in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBT2.c1373 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1383 bandwidth = 1; in INTERN_DVBT2_Config()
1386 bandwidth = 2; in INTERN_DVBT2_Config()
1389 bandwidth = 3; in INTERN_DVBT2_Config()
1392 bandwidth = 5; in INTERN_DVBT2_Config()
1395 bandwidth = 0; in INTERN_DVBT2_Config()
1399 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1289 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1299 bandwidth = 1; in INTERN_DVBT_Config()
1302 bandwidth = 2; in INTERN_DVBT_Config()
1306 bandwidth = 3; in INTERN_DVBT_Config()
1313 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBT2.c1412 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1422 bandwidth = 1; in INTERN_DVBT2_Config()
1425 bandwidth = 2; in INTERN_DVBT2_Config()
1428 bandwidth = 3; in INTERN_DVBT2_Config()
1431 bandwidth = 5; in INTERN_DVBT2_Config()
1434 bandwidth = 0; in INTERN_DVBT2_Config()
1438 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1310 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1320 bandwidth = 1; in INTERN_DVBT_Config()
1323 bandwidth = 2; in INTERN_DVBT_Config()
1327 bandwidth = 3; in INTERN_DVBT_Config()
1334 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBT2.c1373 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1383 bandwidth = 1; in INTERN_DVBT2_Config()
1386 bandwidth = 2; in INTERN_DVBT2_Config()
1389 bandwidth = 3; in INTERN_DVBT2_Config()
1392 bandwidth = 5; in INTERN_DVBT2_Config()
1395 bandwidth = 0; in INTERN_DVBT2_Config()
1399 bandwidth = 4; in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBT2.c1373 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1383 bandwidth = 1; in INTERN_DVBT2_Config()
1386 bandwidth = 2; in INTERN_DVBT2_Config()
1389 bandwidth = 3; in INTERN_DVBT2_Config()
1392 bandwidth = 5; in INTERN_DVBT2_Config()
1395 bandwidth = 0; in INTERN_DVBT2_Config()
1399 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1289 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1299 bandwidth = 1; in INTERN_DVBT_Config()
1302 bandwidth = 2; in INTERN_DVBT_Config()
1306 bandwidth = 3; in INTERN_DVBT_Config()
1313 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBT2.c1373 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1383 bandwidth = 1; in INTERN_DVBT2_Config()
1386 bandwidth = 2; in INTERN_DVBT2_Config()
1389 bandwidth = 3; in INTERN_DVBT2_Config()
1392 bandwidth = 5; in INTERN_DVBT2_Config()
1395 bandwidth = 0; in INTERN_DVBT2_Config()
1399 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1289 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1299 bandwidth = 1; in INTERN_DVBT_Config()
1302 bandwidth = 2; in INTERN_DVBT_Config()
1306 bandwidth = 3; in INTERN_DVBT_Config()
1313 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBT2.c1373 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1383 bandwidth = 1; in INTERN_DVBT2_Config()
1386 bandwidth = 2; in INTERN_DVBT2_Config()
1389 bandwidth = 3; in INTERN_DVBT2_Config()
1392 bandwidth = 5; in INTERN_DVBT2_Config()
1395 bandwidth = 0; in INTERN_DVBT2_Config()
1399 bandwidth = 4; in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1289 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1299 bandwidth = 1; in INTERN_DVBT_Config()
1302 bandwidth = 2; in INTERN_DVBT_Config()
1306 bandwidth = 3; in INTERN_DVBT_Config()
1313 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBT2.c1412 MS_U8 bandwidth; in INTERN_DVBT2_Config() local
1422 bandwidth = 1; in INTERN_DVBT2_Config()
1425 bandwidth = 2; in INTERN_DVBT2_Config()
1428 bandwidth = 3; in INTERN_DVBT2_Config()
1431 bandwidth = 5; in INTERN_DVBT2_Config()
1434 bandwidth = 0; in INTERN_DVBT2_Config()
1438 bandwidth = 4; in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_DVBT.c1514 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1524 bandwidth = 1; in INTERN_DVBT_Config()
1527 bandwidth = 2; in INTERN_DVBT_Config()
1531 bandwidth = 3; in INTERN_DVBT_Config()
1538 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/
H A DhalDMD_INTERN_DVBT.c1512 MS_U8 bandwidth; in INTERN_DVBT_Config() local
1522 bandwidth = 1; in INTERN_DVBT_Config()
1525 bandwidth = 2; in INTERN_DVBT_Config()
1529 bandwidth = 3; in INTERN_DVBT_Config()
1536 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_DVBT_N_CFG_BW, bandwidth); in INTERN_DVBT_Config()

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