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Searched refs:bEnablePhaseLock (Results 1 – 3 of 3) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Ddrv_sc_display.h159 void MDrv_SC_set_fpll(void *pInstance, MS_BOOL bEnable, MS_BOOL bEnablePhaseLock, MS_U8 u8Lpll_bank…
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c1301 void MDrv_SC_set_fpll(void *pInstance, MS_BOOL bEnable, MS_BOOL bEnablePhaseLock, MS_U8 u8Lpll_bank) in MDrv_SC_set_fpll() argument
1310 bEnablePhaseLock = 0; in MDrv_SC_set_fpll()
1322 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "MDrv_SC_set_fpll(%u,%u)\n", bEnable, bEnablePhaseLock) ; in MDrv_SC_set_fpll()
1343 MDrv_Write2ByteMask(L_BK_LPLL(0x0C), bEnablePhaseLock << 6, BIT(6)); in MDrv_SC_set_fpll()
H A Dmdrv_sc_display.c.01299 void MDrv_SC_set_fpll(void *pInstance, MS_BOOL bEnable, MS_BOOL bEnablePhaseLock, MS_U8 u8Lpll_bank)
1308 bEnablePhaseLock = 0;
1320 XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "MDrv_SC_set_fpll(%u,%u)\n", bEnable, bEnablePhaseLock) ;
1341 MDrv_Write2ByteMask(L_BK_LPLL(0x0C), bEnablePhaseLock << 6, BIT(6));