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Searched refs:VPU_RIU_WRITE_BYTE (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/vpu/
H A DregVPU.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/vpu/
H A DregVPU.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/vpu/
H A DregVPU.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/vpu/
H A DregVPU.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/vpu/
H A DregVPU.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/vpu/
H A DregVPU.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/vpu_ex/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DregVPU_EX.h141 #define VPU_RIU_WRITE_BYTE(addr, val) { WRITE_BYTE( VPU_RIU_BASE+(addr), val); } macro
157 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)) , (bEnable) ? (VPU_RIU_READ_BYTE( (((u32Reg…
163 VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
170 … VPU_RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
171 … VPU_RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
182 VPU_RIU_WRITE_BYTE((u32Reg << 1) - 1, u32Val); \
188 VPU_RIU_WRITE_BYTE( (u32Reg + 2) << 1 , ((u32Val) >> 16)); \
195 … VPU_RIU_WRITE_BYTE( ((u32Reg) << 1) - 1 , u32Val); \
197 VPU_RIU_WRITE_BYTE( (((u32Reg) + 3) << 1) , ((u32Val) >> 24)); \
208 …VPU_RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (VPU_RIU_READ_BYTE((((u32Reg) <<1) - ((u32R…

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