Searched refs:REG_TSO0_CFG0_S2P0_CFG_SHIFT (Results 1 – 8 of 8) sorted by relevance
289 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0 macro1826 … ((REG_TSO0_CFG0_S2PCFG_S2P_EN|REG_TSO0_CFG0_S2PCFG_S2P_TSSIN_C0) << REG_TSO0_CFG0_S2P0_CFG_SHIFT); in HAL_TSP_TsOutPadCfg()1830 … TSP_TSO0_REG(REG_TSO0_CFG0) &= ~(REG_TSO0_CFG0_S2PCFG_S2P_EN << REG_TSO0_CFG0_S2P0_CFG_SHIFT); in HAL_TSP_TsOutPadCfg()
383 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0UL macro1865 …u16S2pRegShift = ((u32OutPadMode == HAL_TSP_OUTPAD_S2P) ? REG_TSO0_CFG0_S2P0_CFG_SHIFT : REG_TSO0_… in HAL_TSP_TsOutPadCfg()
397 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0UL macro1887 …u16S2pRegShift = ((u32OutPadMode == HAL_TSP_OUTPAD_S2P) ? REG_TSO0_CFG0_S2P0_CFG_SHIFT : REG_TSO0_… in HAL_TSP_TsOutPadCfg()
335 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0UL macro1835 u16S2pRegShift = REG_TSO0_CFG0_S2P0_CFG_SHIFT; in HAL_TSP_TsOutPadCfg()
403 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0UL macro1917 …u16S2pRegShift = ((u32OutPadMode == HAL_TSP_OUTPAD_S2P) ? REG_TSO0_CFG0_S2P0_CFG_SHIFT : REG_TSO0_… in HAL_TSP_TsOutPadCfg()
418 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0UL macro1974 …u16S2pRegShift = ((u32OutPadMode == HAL_TSP_OUTPAD_S2P) ? REG_TSO0_CFG0_S2P0_CFG_SHIFT : REG_TSO0_… in HAL_TSP_TsOutPadCfg()
418 #define REG_TSO0_CFG0_S2P0_CFG_SHIFT 0UL macro1935 …u16S2pRegShift = ((u32OutPadMode == HAL_TSP_OUTPAD_S2P) ? REG_TSO0_CFG0_S2P0_CFG_SHIFT : REG_TSO0_… in HAL_TSP_TsOutPadCfg()