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Searched refs:REG_TC_VE_ENC2_74_H (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/ve/hal/kano/ve/
H A Dmdrv_dcs_tbl.c139 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
159 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
163 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
183 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
187 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
255 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
275 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
279 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
299 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
303 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
/utopia/UTPA2-700.0.x/modules/ve/hal/curry/ve/
H A Dmdrv_dcs_tbl.c139 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
159 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
163 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
183 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
187 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
255 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
275 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
279 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
299 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
303 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
/utopia/UTPA2-700.0.x/modules/ve/hal/k6lite/ve/
H A Dmdrv_dcs_tbl.c139 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
159 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
163 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
183 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
187 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
255 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
275 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
279 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
299 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
303 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
/utopia/UTPA2-700.0.x/modules/ve/hal/k6/ve/
H A Dmdrv_dcs_tbl.c139 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
159 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
163 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
183 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
187 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
255 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
275 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
279 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
299 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
303 { DRV_DCS_REG(REG_TC_VE_ENC2_74_H), 0xFF, 0x00/*ALL*/, E_DCSST_IS_NOT_ACTIVITIVE_KEYBYTE, NULL},
/utopia/UTPA2-700.0.x/modules/ve/hal/k6lite/ve/include/
H A Dmdrv_macrovision_tbl.h975 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
H A Dmdrv_dcs_tbl.h1076 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
/utopia/UTPA2-700.0.x/modules/ve/hal/curry/ve/include/
H A Dmdrv_macrovision_tbl.h975 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
H A Dmdrv_dcs_tbl.h1076 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
/utopia/UTPA2-700.0.x/modules/ve/hal/kano/ve/include/
H A Dmdrv_macrovision_tbl.h975 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
H A Dmdrv_dcs_tbl.h1076 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
/utopia/UTPA2-700.0.x/modules/ve/hal/k6/ve/include/
H A Dmdrv_macrovision_tbl.h975 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro
H A Dmdrv_dcs_tbl.h1076 #define REG_TC_VE_ENC2_74_H (REG_TC_VE_ENC2_BASE + 0xE9) macro