Home
last modified time | relevance | path

Searched refs:REG_TC_SC_OP1_BK20_22_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c182 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
717 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1248 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1783 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2314 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2845 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3376 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3911 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4446 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4978 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c174 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
703 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
1228 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
1757 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
2282 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
2807 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
3332 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
3861 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
4390 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
4915 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c182 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
717 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1248 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1783 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2314 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2845 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3376 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3911 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4446 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4977 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c178 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
692 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1202 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1716 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2226 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2736 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3246 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3760 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4274 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4784 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5010 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c178 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
692 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1202 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1716 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2226 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2736 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3246 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3760 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4274 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4784 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5010 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c174 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
703 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
1228 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
1757 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
2282 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
2807 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
3332 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
3861 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
4390 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
4915 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x11/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c178 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
692 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1202 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1716 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2226 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2736 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3246 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3760 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4274 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4784 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5010 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c178 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
692 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1202 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
1716 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2226 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
2736 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3246 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
3760 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4274 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
4784 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_22_L), 0xFF, 0x05/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5010 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h1842 #define REG_TC_SC_OP1_BK20_22_L _PK_L_(0x20, 0x22) macro