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Searched refs:REG_TC_SC_OP1_BK20_21_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c180 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
715 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1246 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1781 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2312 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2843 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3374 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3909 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4444 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4976 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c172 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
701 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
1226 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
1755 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
2280 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
2805 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
3330 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
3859 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
4388 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
4913 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c180 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
715 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1246 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1781 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2312 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2843 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3374 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3909 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4444 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4975 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c176 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
690 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1200 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1714 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2224 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2734 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3244 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3758 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4272 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4782 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5008 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c176 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
690 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1200 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1714 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2224 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2734 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3244 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3758 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4272 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4782 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5008 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c172 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
701 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
1226 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
1755 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
2280 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
2805 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
3330 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
3859 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
4388 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
4913 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x12/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c176 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
690 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1200 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1714 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2224 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2734 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3244 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3758 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4272 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4782 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5008 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c176 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
690 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1200 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
1714 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2224 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
2734 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3244 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
3758 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4272 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
4782 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_21_L), 0xFF, 0x08/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h5008 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h1840 #define REG_TC_SC_OP1_BK20_21_L _PK_L_(0x20, 0x21) macro