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Searched refs:REG_TC_SC_OP1_BK20_1B_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c186 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
721 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1252 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1787 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2318 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2849 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3380 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3915 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4450 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4982 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c178 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
707 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1232 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1761 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2286 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2811 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3336 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3865 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4394 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4919 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c186 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
721 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1252 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1787 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2318 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2849 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3380 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3915 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4450 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4981 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c182 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
696 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1206 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1720 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2230 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2740 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3250 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3764 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4278 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4788 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4996 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c182 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
696 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1206 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1720 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2230 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2740 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3250 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3764 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4278 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4788 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4996 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c178 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
707 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1232 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1761 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2286 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2811 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3336 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3865 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4394 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4919 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c182 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
696 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1206 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1720 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2230 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2740 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3250 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3764 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4278 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4788 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4996 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c182 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
696 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1206 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
1720 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2230 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
2740 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3250 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
3764 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4278 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
4788 { DRV_DAC_REG(REG_TC_SC_OP1_BK20_1B_L), 0xFF, 0x15/*ALL*/, },
[all …]
H A Dmdrv_dac_tbl.h4996 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h1828 #define REG_TC_SC_OP1_BK20_1B_L _PK_L_(0x20, 0x1B) macro