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Searched refs:REG_TC_P2I_BK2_05_L (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dmdrv_dac_tbl.h2812 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c217 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1283 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3411 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c209 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1263 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3367 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3896 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c217 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1283 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3411 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3946 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c212 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1236 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3280 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3794 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
H A Dmdrv_dac_tbl.h6494 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c212 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1236 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3280 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3794 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
H A Dmdrv_dac_tbl.h6494 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c209 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1263 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3367 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3896 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c212 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1236 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3280 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3794 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
H A Dmdrv_dac_tbl.h6494 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c212 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x46/*ALL*/, },
1236 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x42/*ALL*/, },
3280 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0xE6/*ALL*/, },
3794 { DRV_DAC_REG(REG_TC_P2I_BK2_05_L), 0xFF, 0x76/*ALL*/, },
H A Dmdrv_dac_tbl.h6494 #define REG_TC_P2I_BK2_05_L _PK_L_(0x2, 0x05) macro