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Searched refs:REG_TC_LPLL_31_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9195 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9743 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10291 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10839 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11387 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11935 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12481 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13027 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13573 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
14119 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9092 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9634 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10176 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10718 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11260 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11802 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12342 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12882 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13422 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13962 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9194 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9742 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10290 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10838 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11386 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11934 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12480 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13026 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13572 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
14118 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8761 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9286 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9811 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10336 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10861 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11386 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11911 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12436 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12961 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13486 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8761 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9286 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9811 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10336 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10861 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11386 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11911 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12436 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12961 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13486 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9092 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9634 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10176 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10718 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11260 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11802 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12342 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12882 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13422 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13962 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8761 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9286 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9811 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10336 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10861 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11386 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11911 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12436 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12961 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13486 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8761 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9286 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
9811 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10336 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
10861 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11386 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
11911 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12436 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
12961 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
13486 { DRV_DAC_REG(REG_TC_LPLL_31_L), 0xFF, 0x50/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
H A Dmdrv_dac_tbl.h1358 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
H A Dmdrv_dac_tbl.h1358 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1240 #define REG_TC_LPLL_31_L (REG_TC_LPLL_BASE + 0x62) macro

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