Home
last modified time | relevance | path

Searched refs:REG_TC_LPLL_30_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9171 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9719 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10267 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10815 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11363 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11911 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12457 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13003 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13549 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
14095 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9068 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9610 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10152 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10694 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11236 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11778 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12318 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12858 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13398 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13938 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9170 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9718 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10266 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10814 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11362 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11910 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12456 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13002 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13548 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
14094 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8737 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9262 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9787 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10312 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10837 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11362 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11887 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12412 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12937 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13462 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8737 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9262 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9787 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10312 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10837 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11362 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11887 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12412 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12937 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13462 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9068 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9610 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10152 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10694 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11236 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11778 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12318 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12858 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13398 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13938 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8737 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9262 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9787 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10312 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10837 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11362 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11887 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12412 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12937 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13462 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8737 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9262 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
9787 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10312 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
10837 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11362 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
11887 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12412 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
12937 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
13462 { DRV_DAC_REG(REG_TC_LPLL_30_L), 0xFF, 0x88/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
H A Dmdrv_dac_tbl.h1356 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1236 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1236 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1236 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
H A Dmdrv_dac_tbl.h1356 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1236 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1238 #define REG_TC_LPLL_30_L (REG_TC_LPLL_BASE + 0x60) macro

12