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Searched refs:REG_TC_LPLL_10_H (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9176 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9724 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10272 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10820 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11368 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11916 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12462 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13008 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13554 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
14100 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9073 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9615 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10157 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10699 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11241 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11783 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12323 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12863 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13403 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13943 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9175 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9723 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10271 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10819 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11367 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11915 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12461 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13007 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13553 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
14099 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8742 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9267 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9792 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10317 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10842 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11367 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11892 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12417 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12942 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13467 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8742 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9267 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9792 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10317 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10842 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11367 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11892 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12417 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12942 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13467 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9073 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9615 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10157 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10699 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11241 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11783 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12323 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12863 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13403 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13943 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8742 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9267 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9792 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10317 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10842 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11367 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11892 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12417 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12942 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13467 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8742 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9267 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
9792 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10317 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
10842 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11367 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
11892 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12417 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
12942 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
13467 { DRV_DAC_REG(REG_TC_LPLL_10_H), 0xFF, 0x19/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
H A Dmdrv_dac_tbl.h1293 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1173 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1173 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1173 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
H A Dmdrv_dac_tbl.h1293 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1173 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1175 #define REG_TC_LPLL_10_H (REG_TC_LPLL_BASE + 0x21) macro

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