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Searched refs:REG_TC_LPLL_0C_L (Results 1 – 25 of 38) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9170 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9197 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9202 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9718 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9745 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9750 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10266 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
10293 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
10298 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10814 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9067 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9094 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9099 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9609 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9636 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9641 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10151 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
10178 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
10183 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10693 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9169 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9196 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9201 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9717 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9744 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9749 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10265 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
10292 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
10297 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10813 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8736 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
8763 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
8768 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9261 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9288 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9293 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9786 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9813 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9818 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10311 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8736 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
8763 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
8768 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9261 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9288 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9293 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9786 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9813 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9818 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10311 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9067 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9094 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9099 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9609 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9636 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9641 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10151 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
10178 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
10183 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10693 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8736 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
8763 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
8768 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9261 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9288 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9293 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9786 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9813 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9818 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10311 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8736 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
8763 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
8768 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9261 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9288 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9293 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
9786 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
9813 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x07, 0x05/*ALL*/, },
9818 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x08/*ALL*/, },
10311 { DRV_DAC_REG(REG_TC_LPLL_0C_L), 0x08, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
H A Dmdrv_dac_tbl.h1284 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
H A Dmdrv_dac_tbl.h1284 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1166 #define REG_TC_LPLL_0C_L (REG_TC_LPLL_BASE + 0x18) macro

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