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Searched refs:REG_TC_LPLL_0B_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9189 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9737 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10285 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10833 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11381 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11929 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12475 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13021 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13567 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
14113 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9086 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9628 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10170 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10712 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11254 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11796 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12336 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12876 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13416 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13956 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9188 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9736 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10284 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10832 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11380 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11928 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12474 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13020 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13566 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
14112 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8755 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9280 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9805 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10330 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10855 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11380 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11905 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12430 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12955 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13480 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8755 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9280 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9805 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10330 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10855 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11380 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11905 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12430 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12955 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13480 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9086 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9628 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10170 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10712 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11254 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11796 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12336 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12876 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13416 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13956 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8755 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9280 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9805 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10330 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10855 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11380 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11905 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12430 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12955 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13480 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8755 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9280 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
9805 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10330 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
10855 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11380 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
11905 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12430 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
12955 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
13480 { DRV_DAC_REG(REG_TC_LPLL_0B_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
H A Dmdrv_dac_tbl.h1282 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1162 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1162 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1162 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
H A Dmdrv_dac_tbl.h1282 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1162 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1164 #define REG_TC_LPLL_0B_L (REG_TC_LPLL_BASE + 0x16) macro

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