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Searched refs:REG_TC_LPLL_09_L (Results 1 – 25 of 38) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9185 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9733 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10281 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10829 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11377 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11925 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12471 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13017 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13563 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
14109 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9082 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9624 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10166 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10708 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11250 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11792 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12332 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12872 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13412 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13952 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9184 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9732 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10280 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10828 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11376 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11924 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12470 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13016 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13562 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
14108 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8751 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9276 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9801 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10326 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10851 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11376 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11901 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12426 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12951 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13476 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8751 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9276 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9801 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10326 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10851 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11376 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11901 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12426 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12951 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13476 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9082 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9624 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10166 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10708 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11250 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11792 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12332 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12872 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13412 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13952 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8751 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9276 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9801 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10326 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10851 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11376 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11901 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12426 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12951 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13476 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8751 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9276 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
9801 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10326 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
10851 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11376 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
11901 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12426 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
12951 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
13476 { DRV_DAC_REG(REG_TC_LPLL_09_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
H A Dmdrv_dac_tbl.h1278 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
H A Dmdrv_dac_tbl.h1278 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1160 #define REG_TC_LPLL_09_L (REG_TC_LPLL_BASE + 0x12) macro

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