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Searched refs:REG_TC_LPLL_09_H (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9186 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9734 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10282 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10830 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11378 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11926 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12472 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13018 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13564 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
14110 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9083 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9625 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10167 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10709 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11251 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11793 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12333 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12873 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13413 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13953 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9185 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9733 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10281 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10829 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11377 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11925 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12471 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13017 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13563 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
14109 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8752 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9277 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9802 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10327 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10852 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11377 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11902 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12427 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12952 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13477 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8752 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9277 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9802 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10327 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10852 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11377 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11902 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12427 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12952 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13477 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9083 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9625 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10167 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10709 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11251 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11793 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12333 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12873 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13413 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13953 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8752 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9277 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9802 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10327 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10852 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11377 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11902 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12427 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12952 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13477 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8752 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9277 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
9802 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10327 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
10852 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11377 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
11902 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12427 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
12952 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
13477 { DRV_DAC_REG(REG_TC_LPLL_09_H), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
H A Dmdrv_dac_tbl.h1279 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1159 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1159 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1159 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
H A Dmdrv_dac_tbl.h1279 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1159 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1161 #define REG_TC_LPLL_09_H (REG_TC_LPLL_BASE + 0x13) macro

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