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Searched refs:REG_TC_LPLL_08_L (Results 1 – 25 of 38) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9183 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9731 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10279 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10827 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11375 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11923 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12469 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13015 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13561 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
14107 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9080 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9622 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10164 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10706 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11248 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11790 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12330 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12870 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13410 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13950 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9182 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9730 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10278 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10826 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11374 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11922 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12468 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13014 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13560 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
14106 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8749 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9274 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9799 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10324 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10849 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11374 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11899 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12424 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12949 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13474 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8749 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9274 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9799 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10324 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10849 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11374 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11899 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12424 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12949 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13474 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9080 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9622 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10164 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10706 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11248 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11790 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12330 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12870 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13410 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13950 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8749 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9274 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9799 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10324 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10849 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11374 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11899 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12424 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12949 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13474 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8749 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9274 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
9799 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10324 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
10849 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11374 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
11899 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12424 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
12949 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
13474 { DRV_DAC_REG(REG_TC_LPLL_08_L), 0xFF, 0x00/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
H A Dmdrv_dac_tbl.h1276 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
H A Dmdrv_dac_tbl.h1276 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1156 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1158 #define REG_TC_LPLL_08_L (REG_TC_LPLL_BASE + 0x10) macro

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