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Searched refs:REG_TC_LPLL_03_L (Results 1 – 25 of 38) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/
H A Dhal_dac_tbl.c9168 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9177 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9203 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9716 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9725 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9751 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10264 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
10273 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
10299 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10812 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/
H A Dhal_dac_tbl.c9065 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9074 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9100 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9616 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9642 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10149 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
10158 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
10184 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10691 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/
H A Dhal_dac_tbl.c9167 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9176 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9202 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9715 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9724 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9750 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10263 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
10272 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
10298 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10811 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A Dmdrv_dac_tbl.c8734 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
8743 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
8769 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9259 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9268 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9294 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9784 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9793 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9819 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10309 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A Dmdrv_dac_tbl.c8734 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
8743 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
8769 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9259 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9268 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9294 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9784 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9793 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9819 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10309 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/
H A Dhal_dac_tbl.c9065 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9074 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9100 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9607 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9616 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9642 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10149 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
10158 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
10184 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10691 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A Dmdrv_dac_tbl.c8734 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
8743 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
8769 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9259 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9268 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9294 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9784 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9793 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9819 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10309 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A Dmdrv_dac_tbl.c8734 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
8743 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
8769 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9259 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9268 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9294 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
9784 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
9793 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x0F, 0x02/*ALL*/, },
9819 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x00/*ALL*/, },
10309 { DRV_DAC_REG(REG_TC_LPLL_03_L), 0x10, 0x10/*ALL*/, },
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
H A Dmdrv_dac_tbl.h1266 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/pnl/
H A Dpnl_tcon_tbl.h1146 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/pnl/
H A Dpnl_tcon_tbl.h1146 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/pnl/
H A Dpnl_tcon_tbl.h1146 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
H A Dmdrv_dac_tbl.h1266 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/pnl/
H A Dpnl_tcon_tbl.h1146 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A Dpnl_tcon_tbl.h1148 #define REG_TC_LPLL_03_L (REG_TC_LPLL_BASE + 0x06) macro

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